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CROSSPOINT SWITCH. SN65LVDS125 Datasheet

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CROSSPOINT SWITCH. SN65LVDS125 Datasheet
















SN65LVDS125 SWITCH. Datasheet pdf. Equivalent













Part

SN65LVDS125

Description

LVDS 4x4 CROSSPOINT SWITCH



Feature


www.ti.com SN65LVDS125 SN65LVDT125 SLLS 555C − DECEMBER 2002 − REVISED OCTO BER 2004 LVDS 4x4 CROSSPOINT SWITCH FE ATURES D Signaling Rates >1.5 Gbps per Channel D Supports Telecom/Datacom and HDTV Video Switching D Non-Blocking Arc hitecture Allows Each Output to be Conn ected to Any Input D Compatible With AN SI TIA/EIA-644-A LVDS Standard D 25 mV of Input Voltage Thres.
Manufacture

Texas Instruments

Datasheet
Download SN65LVDS125 Datasheet


Texas Instruments SN65LVDS125

SN65LVDS125; hold Hysteresis D Propagation Delay Time s, 900 ps Typical D Inputs Electrically Compatible With LVPECL, CML and LVDS S ignal Levels D Operates From a Single 3 .3-V Supply D Integrated 110-Ω Line T ermination Resistors Available With SN6 5LVDT125 APPLICATIONS D Clock Buffering / Clock Muxing D Wireless Base Station s D High-Speed Network Routing D HDTV V ideo Switching DESCR.


Texas Instruments SN65LVDS125

IPTION The SN65LVDS125 and SN65LVDT125 a re 4x4 nonblocking crosspoint switches. Low-voltage differential signaling (LV DS) is used to achieve signaling rates of 1.5 Gbps per channel. Each output dr iver includes a 4:1 multiplexer to allo w any input to be routed to any output. Internal signal paths are fully differ ential to achieve the high signaling sp eeds while maintai.


Texas Instruments SN65LVDS125

ning low signal skews. The SN65LVDT125 i ncorporates 110-Ω termination resisto rs for those applications where board s pace is a premium. Designed to support signaling rates up to 1.5 Gbps for OC- 12 clocks (622 MHz). The 1.5-Gbps signa ling rate allows use in HDTV systems, i ncluding SMPTE 292 video applications r equiring signaling rates of 1.485 Gbps. The SN65LVDS125 an.





Part

SN65LVDS125

Description

LVDS 4x4 CROSSPOINT SWITCH



Feature


www.ti.com SN65LVDS125 SN65LVDT125 SLLS 555C − DECEMBER 2002 − REVISED OCTO BER 2004 LVDS 4x4 CROSSPOINT SWITCH FE ATURES D Signaling Rates >1.5 Gbps per Channel D Supports Telecom/Datacom and HDTV Video Switching D Non-Blocking Arc hitecture Allows Each Output to be Conn ected to Any Input D Compatible With AN SI TIA/EIA-644-A LVDS Standard D 25 mV of Input Voltage Thres.
Manufacture

Texas Instruments

Datasheet
Download SN65LVDS125 Datasheet




 SN65LVDS125
www.ti.com
SN65LVDS125
SN65LVDT125
SLLS555C − DECEMBER 2002 − REVISED OCTOBER 2004
LVDS 4x4 CROSSPOINT SWITCH
FEATURES
D Signaling Rates >1.5 Gbps per Channel
D Supports Telecom/Datacom and HDTV Video
Switching
D Non-Blocking Architecture Allows Each
Output to be Connected to Any Input
D Compatible With ANSI TIA/EIA-644-A LVDS
Standard
D 25 mV of Input Voltage Threshold Hysteresis
D Propagation Delay Times, 900 ps Typical
D Inputs Electrically Compatible With LVPECL,
CML and LVDS Signal Levels
D Operates From a Single 3.3-V Supply
D Integrated 110-Line Termination Resistors
Available With SN65LVDT125
APPLICATIONS
D Clock Buffering / Clock Muxing
D Wireless Base Stations
D High-Speed Network Routing
D HDTV Video Switching
DESCRIPTION
The SN65LVDS125 and SN65LVDT125 are 4x4 nonblocking
crosspoint switches. Low-voltage differential signaling (LVDS)
is used to achieve signaling rates of 1.5 Gbps per channel.
Each output driver includes a 4:1 multiplexer to allow any input
to be routed to any output. Internal signal paths are fully
differential to achieve the high signaling speeds while
maintaining low signal skews. The SN65LVDT125
incorporates 110-termination resistors for those
applications where board space is a premium.
Designed to support signaling rates up to 1.5 Gbps for OC-12
clocks (622 MHz). The 1.5-Gbps signaling rate allows use in
HDTV systems, including SMPTE 292 video applications
requiring signaling rates of 1.485 Gbps.
The SN65LVDS125 and SN65LVDT125 are characterized for
operation from −40°C to 85°C.
SN65LVDS125DBT ( Marked as LVDS125)
SN65LVDT125DBT ( Marked as LVDT125)
(TOP VIEW)
S10
1
S11
2
1A
3
1B
4
S20
5
S21
6
2A
7
2B
8
GND
9
VCC
10
GND
11
3A
12
3B
13
S30
14
S31
15
4A
16
4B
17
S40
18
S41
19
38
VCC
37
GND
36
1Y
35
1Z
34
1DE
33
2Y
32
2Z
31
2DE
30
GND
29
VCC
28
GND
27
3Y
26
3Z
25
3DE
24
4Y
23
4Z
22
4DE
21
GND
20
VCC
Eye Pattern of Two Outputs
Operating Simultaneously
VIC = 1.2 V
SVIDS = 200 mV
1.5 Gbps
223−1 PRBS
VCC = 3.3 V
200 − ps/div
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2002−2004, Texas Instruments Incorporated




 SN65LVDS125
SN65LVDS125
SN65LVDT125
SLLS555C − DECEMBER 2002 − REVISED OCTOBER 2004
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
LOGIC DIAGRAM
8
S10 − S41
1DE
1A
1Y
1B
1Z
2DE
2A
2Y
2B
4X4
2Z
MUX
3DE
3A
3Y
3B
3Z
4DE
4A
4Y
4B
4Z
Integrated 110-W Termination on LVDT Only
2




 SN65LVDS125
www.ti.com
SN65LVDS125
SN65LVDT125
SLLS555C − DECEMBER 2002 − REVISED OCTOBER 2004
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
INPUT LVDS125
A
VCC
VCC B
7V
7V
VCC
300 k
DE
400
7V
S10, S41 400
300 k
7V
OUTPUT LVDS125
VCC
VCC
VCC
VCC
Y
Z
7V
7V
3




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