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D-TYPE FLIP-FLOPS. SNJ54HC175FK Datasheet

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D-TYPE FLIP-FLOPS. SNJ54HC175FK Datasheet
















SNJ54HC175FK FLIP-FLOPS. Datasheet pdf. Equivalent













Part

SNJ54HC175FK

Description

QUADRUPLE D-TYPE FLIP-FLOPS



Feature


D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Contain Four Flip-Flops With Double-Rail Outputs D Typical tpd = 13 ns SN54HC175 . . . J OR W PACKAGE SN74H C175 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) CLR 1 1Q 2 1Q 3 1D 4 2D 5 2 Q 6 2Q 7 GND 8 16 VCC 15 4Q 14 4Q 13 4 D 12 3D 11 3Q 10 3Q.
Manufacture

Texas Instruments

Datasheet
Download SNJ54HC175FK Datasheet


Texas Instruments SNJ54HC175FK

SNJ54HC175FK; 9 CLK SN54HC175, SN74HC175 QUADRUPLE D ĆTYPE FLIPĆFLOPS WITH CLEAR SCLS299D − JANUARY 1996 − REVISED SEPTEMBER 2003 D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Applicati ons Include: − Buffer/Storage Registe rs − Shift Registers − Pattern Gene rators SN54HC175 . . . FK PACKAGE (TOP VIEW) 1Q CLR NC VCC 4Q 3 2 1 20 19 1 Q 4 18 4Q 1D 5 17 4D NC 6 1.


Texas Instruments SNJ54HC175FK

6 NC 2D 7 15 3D 2Q 8 14 3Q 9 10 11 12 13 2Q GND NC CLK 3Q description/or dering information NC − No internal connection These positive-edge-trigger ed D-type flip-flops have a direct clea r (CLR) input. The ’HC175 devices fea ture complementary outputs from each fl ip-flop. ORDERING INFORMATION TA PAC KAGE† ORDERABLE PART NUMBER TOP-SID E MARKING PDIP − N Tub.


Texas Instruments SNJ54HC175FK

e of 25 SN74HC175N SN74HC175N Tube of 40 SN74HC175D SOIC − D Reel of 25 00 Reel of 250 SN74HC175DR SN74HC175DT HC175 −40°C to 85°C SOP − NS SSOP − DB Reel of 2000 Reel of 2000 SN74HC175NSR SN74HC175DBR HC175 HC175 Tube of 90 SN74HC175PW TSSOP − PW Reel of 2000 Reel of 250 SN74HC175PW R SN74HC175PWT HC175 CDIP − J Tube of 25 SNJ54HC175J SNJ54HC175J.





Part

SNJ54HC175FK

Description

QUADRUPLE D-TYPE FLIP-FLOPS



Feature


D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Contain Four Flip-Flops With Double-Rail Outputs D Typical tpd = 13 ns SN54HC175 . . . J OR W PACKAGE SN74H C175 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) CLR 1 1Q 2 1Q 3 1D 4 2D 5 2 Q 6 2Q 7 GND 8 16 VCC 15 4Q 14 4Q 13 4 D 12 3D 11 3Q 10 3Q.
Manufacture

Texas Instruments

Datasheet
Download SNJ54HC175FK Datasheet




 SNJ54HC175FK
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Contain Four Flip-Flops With Double-Rail
Outputs
D Typical tpd = 13 ns
SN54HC175 . . . J OR W PACKAGE
SN74HC175 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
CLR 1
1Q 2
1Q 3
1D 4
2D 5
2Q 6
2Q 7
GND 8
16 VCC
15 4Q
14 4Q
13 4D
12 3D
11 3Q
10 3Q
9 CLK
SN54HC175, SN74HC175
QUADRUPLE DĆTYPE FLIPĆFLOPS
WITH CLEAR
SCLS299D − JANUARY 1996 − REVISED SEPTEMBER 2003
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Applications Include:
− Buffer/Storage Registers
− Shift Registers
− Pattern Generators
SN54HC175 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
1Q 4
18 4Q
1D 5
17 4D
NC 6
16 NC
2D 7
15 3D
2Q 8
14 3Q
9 10 11 12 13
description/ordering information
NC − No internal connection
These positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The ’HC175 devices feature
complementary outputs from each flip-flop.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube of 25
SN74HC175N
SN74HC175N
Tube of 40
SN74HC175D
SOIC − D
Reel of 2500
Reel of 250
SN74HC175DR
SN74HC175DT
HC175
−40°C to 85°C
SOP − NS
SSOP − DB
Reel of 2000
Reel of 2000
SN74HC175NSR
SN74HC175DBR
HC175
HC175
Tube of 90
SN74HC175PW
TSSOP − PW
Reel of 2000
Reel of 250
SN74HC175PWR
SN74HC175PWT
HC175
CDIP − J
Tube of 25
SNJ54HC175J
SNJ54HC175J
−55°C to 125°C CFP − W
Tube of 150
SNJ54HC175W
SNJ54HC175W
LCCC − FK
Tube of 55
SNJ54HC175FK
SNJ54HC175FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1




 SNJ54HC175FK
SN54HC175, SN74HC175
QUADRUPLE DĆTYPE FLIPĆFLOPS
WITH CLEAR
SCLS299D − JANUARY 1996 − REVISED SEPTEMBER 2003
description/ordering information (continued)
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the
positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not
related directly to the transition time of the positive-going edge of CLK. When CLK is at either the high or low
level, the D input has no effect at the output.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUTS
CLR CLK D
Q
Q
L
X
X
L
H
H
H
H
L
H
L
L
H
H
L
X
Q0 Q0
logic diagram (positive logic)
1
CLR
9
CLK
4
1D
1D
C1
R
2
1Q
3
1Q
To Three Other Channels
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 SNJ54HC175FK
SN54HC175, SN74HC175
QUADRUPLE DĆTYPE FLIPĆFLOPS
WITH CLEAR
SCLS299D − JANUARY 1996 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 3)
SN54HC175
MIN NOM MAX
SN74HC175
UNIT
MIN NOM MAX
VCC Supply voltage
2
5
6
2
5
6V
VCC = 2 V
1.5
1.5
VIH High-level input voltage
VCC = 4.5 V
3.15
3.15
V
VCC = 6 V
4.2
4.2
VCC = 2 V
0.5
0.5
VIL
Low-level input voltage
VCC = 4.5 V
1.35
1.35 V
VCC = 6 V
1.8
1.8
VI
Input voltage
0
VCC
0
VCC V
VO
Output voltage
0
VCC
0
VCC V
VCC = 2 V
1000
1000
t/v Input transition rise/fall time
VCC = 4.5 V
500
500 ns
VCC = 6 V
400
400
TA
Operating free-air temperature
−55
125 −40
85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VOH
VOL
II
ICC
Ci
VI = VIH or VIL
IOH = −20 µA
IOH = −4 mA
IOH = −5.2 mA
VI = VIH or VIL
VI = VCC or 0
VI = VCC or 0,
IOL = 20 µA
IOL = 4 mA
IOL = 5.2 mA
IO = 0
VCC
2V
4.5 V
6V
4.5 V
6V
2V
4.5 V
6V
4.5 V
6V
6V
6V
2 V to 6 V
TA = 25°C
MIN TYP MAX
1.9 1.998
4.4 4.499
5.9 5.999
3.98 4.3
5.48 5.8
0.002 0.1
0.001 0.1
0.001 0.1
0.17 0.26
0.15 0.26
±0.1 ±100
8
3
10
SN54HC175
MIN MAX
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1000
160
10
SN74HC175
MIN MAX
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1000
80
10
UNIT
V
V
nA
µA
pF
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3




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