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Line Drivers. CD74HCT540 Datasheet

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Line Drivers. CD74HCT540 Datasheet
















CD74HCT540 Drivers. Datasheet pdf. Equivalent













Part

CD74HCT540

Description

Octal Buffer and Line Drivers



Feature


Data sheet acquired from Harris Semicond uctor SCHS189C January 1998 - Revised J uly 2004 CD54/74HC540, CD74HCT540, CD5 4/74HC541, CD54/74HCT541 High-Speed CMO S Logic Octal Buffer and Line Drivers, Three-State [ /Title (CD74 HC540 , CD7 4 HCT54 0, CD74 HC541 , CD74 HCT54 Fea tures Description • ’HC540, CD74H CT540 . . . . . . . . . . . . . . . . . . . Inverting • ’HC5.
Manufacture

Texas Instruments

Datasheet
Download CD74HCT540 Datasheet


Texas Instruments CD74HCT540

CD74HCT540; 41, ’HCT541 . . . . . . . . . . . . . . . . . . . . . . Non-Inverting • Bu ffered Inputs • Three-State Outputs • Bus Line Driving Capability • Typical Propagation Delay CL = 15pF, TA = 25oC = 9ns at VCC = 5V, • F anout (Over Temperature Range) - Stand ard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 .


Texas Instruments CD74HCT540

LSTTL Loads • Wide Operating Temperat ure Range . . . -55oC to 125oC • Bal anced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Ty pes - 2V to 6V Operation - High Noise I mmunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Co mpatibility, VIL= 0.8V (Max), .


Texas Instruments CD74HCT540

VIH = 2V (Min) - CMOS Input Compatibilit y, Il ≤ 1µA at VOL, VOH The ’HC54 0 and CD74HCT540 are Inverting Octal Bu ffers and Line Drivers with Three-State Outputs and the capability to drive 15 LSTTL loads. The ’HC541 and ’HCT54 1 are NonInverting Octal Buffers and Li ne Drivers with Three-State Outputs tha t can drive 15 LSTTL loads. The Output Enables (OE1) and (OE2) con.




Part

CD74HCT540

Description

Octal Buffer and Line Drivers



Feature


Data sheet acquired from Harris Semicond uctor SCHS189C January 1998 - Revised J uly 2004 CD54/74HC540, CD74HCT540, CD5 4/74HC541, CD54/74HCT541 High-Speed CMO S Logic Octal Buffer and Line Drivers, Three-State [ /Title (CD74 HC540 , CD7 4 HCT54 0, CD74 HC541 , CD74 HCT54 Fea tures Description • ’HC540, CD74H CT540 . . . . . . . . . . . . . . . . . . . Inverting • ’HC5.
Manufacture

Texas Instruments

Datasheet
Download CD74HCT540 Datasheet




 CD74HCT540
Data sheet acquired from Harris Semiconductor
SCHS189C
January 1998 - Revised July 2004
CD54/74HC540, CD74HCT540,
CD54/74HC541, CD54/74HCT541
High-Speed CMOS Logic
Octal Buffer and Line Drivers, Three-State
[ /Title
(CD74
HC540
,
CD74
HCT54
0,
CD74
HC541
,
CD74
HCT54
Features
Description
• ’HC540, CD74HCT540 . . . . . . . . . . . . . . . . . . . Inverting
• ’HC541, ’HCT541 . . . . . . . . . . . . . . . . . . . . . . Non-Inverting
• Buffered Inputs
• Three-State Outputs
• Bus Line Driving Capability
Typical Propagation Delay
CL = 15pF, TA = 25oC
=
9ns
at
VCC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
The ’HC540 and CD74HCT540 are Inverting Octal Buffers
and Line Drivers with Three-State Outputs and the capability
to drive 15 LSTTL loads. The ’HC541 and ’HCT541 are Non-
Inverting Octal Buffers and Line Drivers with Three-State Out-
puts that can drive 15 LSTTL loads. The Output Enables
(OE1) and (OE2) control the Three-State Outputs. If either
OE1 or OE2 is HIGH the outputs will be in the high imped-
ance state. For data output OE1 and OE2 both must be LOW.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC540F3A
-55 to 125
20 Ld CERDIP
CD54HC541F3A
-55 to 125
20 Ld CERDIP
CD54HCT541F3A
-55 to 125
20 Ld CERDIP
CD74HC540E
-55 to 125
20 Ld PDIP
CD74HC540M
-55 to 125
20 Ld SOIC
CD74HC540M96
-55 to 125
20 Ld SOIC
CD74HC541E
-55 to 125
20 Ld PDIP
CD74HC541M
-55 to 125
20 Ld SOIC
CD74HC541M96
-55 to 125
20 Ld SOIC
CD74HC541PW
-55 to 125
20 Ld TSSOP
CD74HC541PWR
-55 to 125
20 Ld TSSOP
CD74HCT540E
-55 to 125
20 Ld PDIP
CD74HCT540M
-55 to 125
20 Ld SOIC
CD74HCT540M96
-55 to 125
20 Ld SOIC
CD74HCT541E
-55 to 125
20 Ld PDIP
CD74HCT541M
-55 to 125
20 Ld SOIC
CD74HCT541M96
-55 to 125
20 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
1




 CD74HCT540
CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541
Pinouts
CD54HC540
(CERDIP)
CD74HC540, CD74HCT540
(PDIP, SOIC)
TOP VIEW
OE 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
Functional Diagram
D0
D1
D2
D3
D4
D5
D6
D7
CD54HC541, CD54HCT541
(CERDIP)
CD74HC541
(PDIP, SOIC, TSSOP)
CD74HCT541
(PDIP, SOIC)
TOP VIEW
OE1 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
OEA
OEB
540 541
Y0 Y0
Y1 Y1
Y2 Y2
Y3 Y3
Y4 Y4
Y5 Y5
Y6 Y6
Y7 Y7
2




 CD74HCT540
CD54/74HC540, CD74HCT540, CD54/74HC541, CD54/74HCT541
INPUTS
OE1
OE2
L
L
H
X
X
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X= Don’t Care
Z = High Impedance
TRUTH TABLE
An
H
X
X
L
OUTPUTS
540
541
L
H
Z
Z
Z
Z
H
L
3




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