DatasheetsPDF.com

Buffer Gate. SN74AUC1G125 Datasheet

DatasheetsPDF.com

Buffer Gate. SN74AUC1G125 Datasheet






SN74AUC1G125 Gate. Datasheet pdf. Equivalent




SN74AUC1G125 Gate. Datasheet pdf. Equivalent





Part

SN74AUC1G125

Description

Single Bus Buffer Gate



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity SN74AUC1G125 SCES382L – MARCH 2002 – REVISED JUNE 2017 SN74AUC1G12 5 Single Bus Buffer Gate With 3-State O utput 1 Features •1 Latch-Up Perform ance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) .
Manufacture

Texas Instruments

Datasheet
Download SN74AUC1G125 Datasheet


Texas Instruments SN74AUC1G125

SN74AUC1G125; – 1000-V Charged-Device Model (C101) Available in the Texas Instruments N anoFree™ Package • Optimized for 1. 8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial Power Down M ode and Back Drive Protection • Sub-1 -V Operable • Max tpd of 2.5 ns at 1. 8 V • Low Power Consumption, 10-µA M aximum ICC • ±8-mA Output Drive at .


Texas Instruments SN74AUC1G125

1.8 V 3 Description This bus buffer gat e is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65- V to 1.95-V VCC operation. The SN74AUC1 G125 device is a single line driver wit h a 3-state output. The output is disab led when the output-enable (OE) input i s high. To ensure the high-impedance st ate during power up or power down, OE s hould be tied to V.


Texas Instruments SN74AUC1G125

CC through a pullup resistor; the minimu m value of the resistor is determined b y the current-sinking capability of the driver. NanoFree™ package technology is a major breakthrough in IC packagin g concepts, using the die as the packag e. This device is fully specified for p artial-power-down applications using Io ff. The Ioff circuitry disables the out puts, preventing dam.

Part

SN74AUC1G125

Description

Single Bus Buffer Gate



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity SN74AUC1G125 SCES382L – MARCH 2002 – REVISED JUNE 2017 SN74AUC1G12 5 Single Bus Buffer Gate With 3-State O utput 1 Features •1 Latch-Up Perform ance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) .
Manufacture

Texas Instruments

Datasheet
Download SN74AUC1G125 Datasheet




 SN74AUC1G125
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
SN74AUC1G125
SCES382L – MARCH 2002 – REVISED JUNE 2017
SN74AUC1G125 Single Bus Buffer Gate With 3-State Output
1 Features
1 Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• Available in the Texas Instruments
NanoFree™ Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal Operation
• Ioff Supports Partial Power Down Mode and Back
Drive Protection
• Sub-1-V Operable
• Max tpd of 2.5 ns at 1.8 V
• Low Power Consumption, 10-µA Maximum ICC
• ±8-mA Output Drive at 1.8 V
3 Description
This bus buffer gate is operational at 0.8-V to 2.7-V
VCC, but is designed specifically for 1.65-V to 1.95-V
VCC operation.
The SN74AUC1G125 device is a single line driver
with a 3-state output. The output is disabled when the
output-enable (OE) input is high.
To ensure the high-impedance state during power up
or power down, OE should be tied to VCC through a
pullup resistor; the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
NanoFree™ package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
2 Applications
• AV Receiver
• Audio Dock: Portable
• Blu-Ray Player and Home Theater
• Embedded PC
• MP3 Player/Recorder (Portable Audio)
• Personal Digital Assistant (PDA)
• Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital
• Solid State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Video Analytics: Server
• Wireless Headset, Keyboard, and Mouse
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN74AUC1G125DBV SOT-23 (5)
2.90 mm × 1.60 mm
SN74AUC1G125DCK SC70 (5)
2.00 mm × 1.25 mm
SN74AUC1G125YZP DSBGA (5)
1.75 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)
1
OE
2
A
4
Y
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.




 SN74AUC1G125
SN74AUC1G125
SCES382L – MARCH 2002 – REVISED JUNE 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics: CL = 15 pF ...................... 5
6.7 Switching Characteristics: CL = 30 pF ...................... 6
6.8 Operating Characteristics.......................................... 6
7 Parameter Measurement Information .................. 7
8 Detailed Description .............................................. 8
8.1 Functional Block Diagram ......................................... 8
8.2 Device Functional Modes.......................................... 8
9 Device and Documentation Support.................... 9
9.1 Documentation Support ............................................ 9
9.2 Receiving Notification of Documentation Updates.... 9
9.3 Community Resources.............................................. 9
9.4 Trademarks ............................................................... 9
9.5 Electrostatic Discharge Caution ................................ 9
9.6 Glossary .................................................................... 9
10 Mechanical, Packaging, and Orderable
Information ............................................................. 9
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision K (April 2007) to Revision L
Page
• Deleted DRY package throughout data sheet........................................................................................................................ 1
• Added Applications, Device Information table, ESD Ratings table, Thermal Information table, Feature Description
section, Device Functional Modes, Device and Documentation Support section, and Mechanical, Packaging, and
Orderable Information section ................................................................................................................................................ 1
• Deleted Ordering Information table, see Mechanical, Packaging, and Orderable Information at the end of the data
sheet ...................................................................................................................................................................................... 1
2
Submit Documentation Feedback
Copyright © 2002–2017, Texas Instruments Incorporated
Product Folder Links: SN74AUC1G125




 SN74AUC1G125
www.ti.com
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
OE
1
5
VCC
A
2
GND
3
4
Y
SN74AUC1G125
SCES382L – MARCH 2002 – REVISED JUNE 2017
DCK Package
5-Pin SC70
Top View
OE
1
5
VCC
A
2
GND
3
4Y
YZP Package
5-Pin DSBGA
Bottom View
1
2
C GND
Y
B
A
NC – No internal connection
See mechanical drawings for dimensions.
PIN
I/O
NAME
DBV, DCK
YZP
A
2
B1
I
GND
3
C1
OE
1
A1
I
VCC
5
A2
Y
4
C2
O
A
OE
VCC
Not to scale
Pin Functions
Logic input
Ground
Active-low output enable
Positive supply
Output
DESCRIPTION
Copyright © 2002–2017, Texas Instruments Incorporated
Product Folder Links: SN74AUC1G125
Submit Documentation Feedback
3



Recommended third-party SN74AUC1G125 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)