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16-BIT BUFFER/DRIVER. SN74AUC16244 Datasheet

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16-BIT BUFFER/DRIVER. SN74AUC16244 Datasheet






SN74AUC16244 BUFFER/DRIVER. Datasheet pdf. Equivalent




SN74AUC16244 BUFFER/DRIVER. Datasheet pdf. Equivalent





Part

SN74AUC16244

Description

16-BIT BUFFER/DRIVER



Feature


www.ti.com SN74AUC16244 16-BIT BUFFER/D RIVER WITH 3-STATE OUTPUTS SCES399E – JULY 2002 – REVISED FEBRUARY 2008 F EATURES 1 •2 Member of the Texas Inst ruments Widebus™ Family • Optimized for 1.8-V Operation and Is 3.6-V I/O T olerant to Support Mixed-Mode Signal Op eration • Ioff Supports Partial-Power -Down Mode Operation • Sub-1-V Operab le • Max tpd of 2 ns at 1.8 V • .
Manufacture

Texas Instruments

Datasheet
Download SN74AUC16244 Datasheet


Texas Instruments SN74AUC16244

SN74AUC16244; Low Power Consumption, 20-µA Max ICC ±8-mA Output Drive at 1.8 V • Latc h-Up Performance Exceeds 100 mA Per JES D 78, Class II • ESD Protection Excee ds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115- A) – 1000-V Charged-Device Model (C10 1) DESCRIPTION/ORDERING INFORMATION Thi s 16-bit buffer/driver is operational a t 0.8-V to 2.7-V VCC, but is des.


Texas Instruments SN74AUC16244

igned specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC16244 is desi gned specifically to improve the perfor mance and density of 3-state memory add ress drivers, clock drivers, and bus-or iented receivers and transmitters. DGG OR DGV PACKAGE (TOP VIEW) 1OE 1 1Y1 2 1Y2 3 GND 4 1Y3 5 1Y4 6 VCC 7 2Y1 8 2Y 2 9 GND 10 2Y3 11 2Y4 12 3Y1 13 3Y2 14 GND 15 3Y3 16 3Y4 .


Texas Instruments SN74AUC16244

17 VCC 18 4Y1 19 4Y2 20 GND 21 4Y3 22 4Y 4 23 4OE 24 48 2OE 47 1A1 46 1A2 45 GN D 44 1A3 43 1A4 42 VCC 41 2A1 40 2A2 39 GND 38 2A3 37 2A4 36 3A1 35 3A2 34 GND 33 3A3 32 3A4 31 VCC 30 4A1 29 4A2 28 GND 27 4A3 26 4A4 25 3OE The device ca n be used as four 4-bit buffers, two 8- bit buffers, or one 16-bit buffer. It p rovides true outputs and symmetrical ac tive-low output-en.

Part

SN74AUC16244

Description

16-BIT BUFFER/DRIVER



Feature


www.ti.com SN74AUC16244 16-BIT BUFFER/D RIVER WITH 3-STATE OUTPUTS SCES399E – JULY 2002 – REVISED FEBRUARY 2008 F EATURES 1 •2 Member of the Texas Inst ruments Widebus™ Family • Optimized for 1.8-V Operation and Is 3.6-V I/O T olerant to Support Mixed-Mode Signal Op eration • Ioff Supports Partial-Power -Down Mode Operation • Sub-1-V Operab le • Max tpd of 2 ns at 1.8 V • .
Manufacture

Texas Instruments

Datasheet
Download SN74AUC16244 Datasheet




 SN74AUC16244
www.ti.com
SN74AUC16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES399E – JULY 2002 – REVISED FEBRUARY 2008
FEATURES
1
2 Member of the Texas Instruments Widebus™
Family
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 2 ns at 1.8 V
Low Power Consumption, 20-µA Max ICC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit buffer/driver is operational at 0.8-V to
2.7-V VCC, but is designed specifically for 1.65-V to
1.95-V VCC operation.
The SN74AUC16244 is designed specifically to
improve the performance and density of 3-state
memory address drivers, clock drivers, and
bus-oriented receivers and transmitters.
DGG OR DGV PACKAGE
(TOP VIEW)
1OE 1
1Y1 2
1Y2 3
GND 4
1Y3 5
1Y4 6
VCC 7
2Y1 8
2Y2 9
GND 10
2Y3 11
2Y4 12
3Y1 13
3Y2 14
GND 15
3Y3 16
3Y4 17
VCC 18
4Y1 19
4Y2 20
GND 21
4Y3 22
4Y4 23
4OE 24
48 2OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 VCC
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 3A1
35 3A2
34 GND
33 3A3
32 3A4
31 VCC
30 4A1
29 4A2
28 GND
27 4A3
26 4A4
25 3OE
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and
symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–40C to 85C
ORDERING INFORMATION
PACKAGE (1) (2)
ORDERABLE PART NUMBER
TSSOP – DGG
Tape and reel
SN74AUC16244DGGR
TVSOP – DGV
Tape and reel
SN74AUC16244DGVR
VFBGA – GQL
Tape and reel
SN74AUC16244GQLR
TOP-SIDE MARKING
AUC16244
MH244
MH244
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2008, Texas Instruments Incorporated




 SN74AUC16244
SN74AUC16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES399E – JULY 2002 – REVISED FEBRUARY 2008
GQL PACKAGE
(TOP VIEW)
123456
A
B
C
D
E
F
G
H
J
K
www.ti.com
ABC
ABC
ABC
TERMINAL ASSIGNMENTS(1)
1
2
3
4
5
A 1OE
NC
NC
NC
NC
B 1Y2
1Y1 GND GND
1A1
C 1Y4
D 2Y2
1Y3
VCC
VCC
1A3
2Y1 GND GND
2A1
E 2Y4
2Y3
2A3
F
3Y1
3Y2
3A2
G 3Y3
3Y4 GND GND
3A4
H 4Y1
J
4Y3
4Y2
VCC
VCC
4A2
4Y4 GND GND
4A4
K 4OE
NC
NC
NC
NC
(1) NC - No internal connection
6
2OE
1A2
1A4
2A2
2A4
3A1
3A3
4A1
4A3
3OE
FUNCTION TABLE
(EACH 4-BIT BUFFER)
INPUTS
OE
A
L
H
L
L
H
X
OUTPUT
Y
H
L
Z
2
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Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AUC16244




 SN74AUC16244
www.ti.com
1
1OE
47
1A1
46
1A2
1A3 44
1A4 43
SN74AUC16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES399E – JULY 2002 – REVISED FEBRUARY 2008
LOGIC DIAGRAM (POSITIVE LOGIC)
25
3OE
2
1Y1
36
3A1
13
3Y1
3
1Y2
35
3A2
14
3Y2
5 1Y3
3A3 33
16 3Y3
6 1Y4
3A4 32
17 3Y4
48
2OE
41
2A1
40
2A2
2A3 38
2A4 37
8
2Y1
9
2Y2
11 2Y3
12 2Y4
24
4OE
30
4A1
29
4A2
4A3 27
4A4 26
Pin numbers shown are for the DGG and DGV packages.
19
4Y1
20
4Y2
22 4Y3
23 4Y4
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range
VI
Input voltage range(2)
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
VO
Output voltage range(2)
IIK
Input clamp current
VI < 0
IOK
Output clamp current
VO < 0
IO
Continuous output current
Continuous current through VCC or GND
DGG package
θJA
Package thermal impedance(3)
DGV package
GQL package
Tstg
Storage temperature range
MIN
MAX
–0.5
3.6
–0.5
3.6
–0.5
3.6
–0.5 VCC + 0.5
–50
–50
20
100
70
58
42
–65
150
UNIT
V
V
V
V
mA
mA
mA
mA
C/W
C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2002–2008, Texas Instruments Incorporated
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3
Product Folder Link(s): SN74AUC16244



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