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ASYNCHRONOUS FIFO. IDT72V02 Datasheet

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ASYNCHRONOUS FIFO. IDT72V02 Datasheet






IDT72V02 FIFO. Datasheet pdf. Equivalent




IDT72V02 FIFO. Datasheet pdf. Equivalent





Part

IDT72V02

Description

3.3 VOLT CMOS ASYNCHRONOUS FIFO



Feature


3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9 , 1,024 x 9, IDT72V01, IDT72V02 2,048 x 9, 4,096 x 9, IDT72V03, IDT72V04 8 ,192 x 9, 16,384 x 9 IDT72V05, IDT72V0 6 LEAD FINISH (SnPb) ARE IN EOL PROCES S - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: • 3.3V family uses less p ower than the 5 Volt 7201/7202/7203/720 4/ 7205/7206 family • 512 x 9 organiz ation (72V01) • 1,024 .
Manufacture

Renesas

Datasheet
Download IDT72V02 Datasheet


Renesas IDT72V02

IDT72V02; x 9 organization (72V02) • 2,048 x 9 o rganization (72V03) • 4,096 X 9 organ ization (72V04) • 8,192 x 9 organizat ion (72V05) • 16,384 X 9 organization (72V06) • Functionally compatible wi th 720x family • Low-power consumptio n — Active: 180 mW (max.) — Power-d own: 18 mW (max.) • 15 ns access time • Asynchronous and simultaneous read and write • Fully expandable by both .


Renesas IDT72V02

word depth and/or bit width • Status F lags: Empty, Half-Full, Full • Auto-r etransmit capability • Available in 3 2-pin PLCC • Industrial temperature r ange (–40°C to +85°C) is available • Green parts available, see ordering information DESCRIPTION: The IDT72V01 /72V02/72V03/72V04/72V05/72V06 are dual -port FIFO memories that operate at a p ower supply voltage (Vcc) betwee.


Renesas IDT72V02

n 3.0V and 3.6V. Their architecture, fun ctional operation and pin assignments a re identical to those of the IDT7201/72 02/7203/7204/7205/7206. These devices l oad and empty data on a first-in/first- out basis. They use Full and Empty flag s to prevent data overflow and underflo w and expansion logic to allow for unli mited expansion capability in both word size and depth. T.

Part

IDT72V02

Description

3.3 VOLT CMOS ASYNCHRONOUS FIFO



Feature


3.3 VOLT CMOS ASYNCHRONOUS FIFO 512 x 9 , 1,024 x 9, IDT72V01, IDT72V02 2,048 x 9, 4,096 x 9, IDT72V03, IDT72V04 8 ,192 x 9, 16,384 x 9 IDT72V05, IDT72V0 6 LEAD FINISH (SnPb) ARE IN EOL PROCES S - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: • 3.3V family uses less p ower than the 5 Volt 7201/7202/7203/720 4/ 7205/7206 family • 512 x 9 organiz ation (72V01) • 1,024 .
Manufacture

Renesas

Datasheet
Download IDT72V02 Datasheet




 IDT72V02
3.3 VOLT CMOS ASYNCHRONOUS FIFO
512 x 9, 1,024 x 9,
IDT72V01, IDT72V02
2,048 x 9, 4,096 x 9,
IDT72V03, IDT72V04
8,192 x 9, 16,384 x 9
IDT72V05, IDT72V06
LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018
FEATURES:
3.3V family uses less power than the 5 Volt 7201/7202/7203/7204/
7205/7206 family
512 x 9 organization (72V01)
1,024 x 9 organization (72V02)
2,048 x 9 organization (72V03)
4,096 X 9 organization (72V04)
8,192 x 9 organization (72V05)
16,384 X 9 organization (72V06)
Functionally compatible with 720x family
Low-power consumption
— Active: 180 mW (max.)
— Power-down: 18 mW (max.)
15 ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
Available in 32-pin PLCC
Industrial temperature range (–40°C to +85°C) is available
Green parts available, see ordering information
DESCRIPTION:
The IDT72V01/72V02/72V03/72V04/72V05/72V06 are dual-port FIFO
memories that operate at a power supply voltage (Vcc) between 3.0V and 3.6V.
Their architecture, functional operation and pin assignments are identical to
those of the IDT7201/7202/7203/7204/7205/7206. These devices load and
empty data on a first-in/first-out basis. They use Full and Empty flags to prevent
data overflow and underflow and expansion logic to allow for unlimited
expansion capability in both word size and depth.
The reads and writes are internally sequential through the use of ring
pointers, with no address information required to load and unload data. Data
is toggled in and out of the devices through the use of the Write (W) and Read
(R) pins. The devices have a maximum data access time as fast as 25 ns.
The devices utilize a 9-bit wide data array to allow for control and parity bits
at the user’s option. This feature is especially useful in data communications
applications where it is necessary to use a parity bit for transmission/reception
error checking. They also feature a Retransmit (RT) capability that allows for
reset of the read pointer to its initial position when RT is pulsed LOW to allow for
retransmission from the beginning of data. A Half-Full Flag is available in the
single device mode and width expansion modes.
These FIFOs are fabricated using high-speed CMOS technology. It has
been designed for those applications requiring asynchronous and simultane-
ous read/writes in multiprocessing and rate buffer applications.
FUNCTIONAL BLOCK DIAGRAM
W
WRITE
CONTROL
DATA INPUTS
(D0-D8)
WRITE
POINTER
RAM
ARRAY
512 x 9
1,024 x 9
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
READ
POINTER
R
READ
CONTROL
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q0-Q8)
FLAG
LOGIC
EF
FF
RS
RESET
LOGIC
FL/RT
EXPANSION
XI
LOGIC
XO/HF
3033 drw 01
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
1
©2017 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
NOVEMBER 2017
DSC-3033/8




 IDT72V02
IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO
512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
PIN CONFIGURATION
INDEX
4 3 2 1 32 31 30
D2
5
29
D6
D1
6
28
D7
D0
7
XI
8
27
NC
26
FL/RT
FF
9
Q0
10
25
RS
24
EF
Q1
11
23
XO/HF
NC
12
22
Q7
Q2
13
21
Q6
14 15 16 17 18 19 20
PLCC (J32-1, order code: J)
TOP VIEW
3033 drw 02b
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
Com'l & Ind'l
Unit
VTERM
Terminal Voltage
with Respect to GND
–0.5 to +7.0
V
TSTG
Storage Temperature
–55 to +125
°C
IOUT
DC Output Current
–50 to +50
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Rating
Min. Typ. Max. Unit
VCC Supply Voltage
3.0 3.3 3.6
V
GND Supply Voltage
00
0
V
VIH(1) Input High Voltage
2.0 — VCC+0.5 V
VIL(2) Input Low Voltage
——
0.8
V
TA
OperatingTemperatureCommercial 0 —
70
°C
TA
Operating Temperature Industrial
–40 —
85
°C
NOTES:
1. For RT/RS/XI input, VIH = 2.6V (commercial).
For RT/RS/XI input, VIH = 2.8V (military).
2. 1.5V undershoots are allowed for 10ns once per cycle.
DC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 3.3V ± 0.3V, TA = 0°C to +70°C; Industrial: VCC = 3.3V ± 0.3V, TA = –40°C to +85°C)
IDT72V01
IDT72V02
IDT72V03
IDT72V04
Commercial & Industrial(1)
tA = 15, 25, 35 ns
IDT72V05
IDT72V06
Commercial & Industrial(1)
tA = 15, 25, 35 ns
Symbol
ILI(2)
ILO(3)
VOH
VOL
ICC1(4,5)
ICC2(4,6)
Parameter
Input Leakage Current (Any Input)
Output Leakage Current
Output Logic “1” Voltage IOH = –2mA
Output Logic “0” Voltage IOL = 8mA
Active Power Supply Current
Standby Current (R=W=RS=FL/RT=VIH)
Min.
Max.
Min.
Max.
Unit
–1
1
–1
1
µA
–10
10
–10
10
µA
2.4
2.4
V
0.4
0.4
V
60
75
mA
5
5
mA
NOTES:
1. Industrial temperature range product for the 25ns speed grade is available as a standard device. All other speed grades are available by special order.
2. Measurements with 0.4 VIN VCC.
3. R VIH, 0.4 VOUT VCC.
4. Tested with outputs open (IOUT = 0).
5. Tested at f = 20 MHz.
6. All Inputs = VCC - 0.2V or GND + 0.2V.
CAPACITANCE (TA = +25°C, f = 1.0 MHz)
Symbol
Parameter(1)
Condition
Max. Unit
CIN
COUT
Input Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
8
pF
8
pF
NOTE:
1. Characterized values, not currently tested.
2




 IDT72V02
IDT72V01/72V02/72V03/72V04/72V05/72V06 3.3V ASYNCHRONOUS FIFO
512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9, 8,192 x 9 and 16,384 x 9
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 3.3V ± 0.3V, TA = 0°C to +70°C; Industrial: VCC = 3.3V ± 0.3V, TA = –40°C to +85°C)
Symbol
Parameter
Commercial
IDT72V01L15
IDT72V02L15
IDT72V03L15
IDT72V04L15
IDT72V05L15
IDT72V06L15
Min.
Max.
Com'l and Ind'l(2)
IDT72V01L25
IDT72V02L25
IDT72V03L25
IDT72V04L25
IDT72V05L25
IDT72V06L25
Min.
Max.
fS
Shift Frequency
40
28.5
tRC
Read Cycle Time
25
35
tA
Access Time
15
25
tRR
Read Recovery Time
10
10
tRPW
Read Pulse Width(3)
15
25
tRLZ
Read Pulse Low to Data Bus at Low Z(4)
3
3
tWLZ
Write Pulse High to Data Bus at Low Z(4,5)
5
5
tDV
Data Valid from Read Pulse High
5
5
tRHZ
Read Pulse High to Data Bus at High Z(4)
15
18
tWC
Write Cycle Time
25
35
tWPW
Write Pulse Width(3)
15
25
tWR
Write Recovery Time
10
10
tDS
Data Setup Time
11
15
tDH
Data Hold Time
0
0
tRSC
Reset Cycle Time
25
35
tRS
Reset Pulse Width(3)
15
25
tRSS
Reset Setup Time(4)
15
25
tRSR
Reset Recovery Time
10
10
tRTC
Retransmit Cycle Time
25
35
tRT
Retransmit Pulse Width(3)
15
25
tRTS
Retransmit Setup Time(4)
15
25
tRTR
Retransmit Recovery Time
10
10
tEFL
Reset to Empty Flag Low
25
35
tHFH,FFH ResettoHalf-FullandFullFlagHigh
25
35
tRTF
Retransmit Low to Flags Valid
25
35
tREF
Read Low to Empty Flag Low
15
25
tRFF
Read High to Full Flag High
15
25
tRPE
Read Pulse Width after EF High
15
25
tWEF
Write High to Empty Flag High
15
25
tWFF
Write Low to Full Flag Low
15
25
tWHF
Write Low to Half-Full Flag Low
25
35
tRHF
Read High to Half-Full Flag High
25
35
tWPF
Write Pulse Width after FFHigh
15
25
tXOL
Read/Write to XO Low
15
25
tXOH
Read/Write to XO High
15
25
tXI
XI Pulse Width(3)
15
25
tXIR
XI Recovery Time
10
10
tXIS
XI Setup Time
10
10
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Industrial temperature range product for the 25ns speed grade is available as a standard device.
All other speed grades are available by special order.
3. Pulse widths less than minimum value are not allowed.
4. Values guaranteed by design, not currently tested.
5. Only applies to read data flow-through mode.
D.U.T.
Commercial
IDT72V01L35
IDT72V02L35
IDT72V03L35
IDT72V04L35
IDT72V05L35
IDT72V06L35
Min.
Max.
Unit
22.2
MHz
45
ns
35
ns
10
ns
35
ns
3
ns
5
ns
5
ns
20
ns
45
ns
35
ns
10
ns
18
ns
0
ns
45
ns
35
ns
35
ns
10
ns
45
ns
35
ns
35
ns
10
ns
45
ns
45
ns
45
ns
30
ns
30
ns
35
ns
30
ns
30
ns
45
ns
45
ns
35
ns
35
ns
35
ns
35
ns
10
ns
10
ns
3.3V
330Ω
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
See Figure 1
510Ω
30pF*
3033 drw 03
or equivalent circuit
Figure 1. Output Load
* Includes scope and jig capacitances.
3



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