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PSoC-63 MCU. CY8C6336 Datasheet

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PSoC-63 MCU. CY8C6336 Datasheet
















CY8C6336 MCU. Datasheet pdf. Equivalent













Part

CY8C6336

Description

PSoC-63 MCU



Feature


PSoC 6 MCU: CY8C63x6, CY8C63x7 Datasheet PSoC 63 MCU with Bluetooth LE General Description PSoC® 6 MCU is a high-pe rformance, ultra-low-power and secured MCU platform, purpose-built for IoT app lications. The PSoC 63 withBluetooth LE product line, based on the PSoC 6 MCU platform, is a combination of a high-pe rformance microcontroller with low-powe r flash technology,.
Manufacture

Cypress

Datasheet
Download CY8C6336 Datasheet


Cypress CY8C6336

CY8C6336; digital programmable logic, high-perfor mance analog-to-digital conversion and standard communication and timing perip herals. The PSoC 63 product line provid es wireless connectivity with Bluetooth LE 5.0 compliance. Features 32-bit D ual CPU Subsystem ■ 150-MHz Arm® Cor tex®-M4F (CM4) CPU with single-cycle m ultiply, floating point, and memory pro tection unit (MPU) ■ 1.


Cypress CY8C6336

00-MHz Cortex-M0+ (CM0+) CPU with single -cycle multiply and MPU ■ User-select able core logic operation at either 1.1 V or 0.9 V ■ Active CPU current slop e with 1.1-V core operation ❐ Cortex- M4: 40 µA/MHz ❐ Cortex-M0+: 20 µA/M Hz ■ Active CPU current slope with 0. 9-V core operation ❐ Cortex-M4: 22 µ A/MHz ❐ Cortex-M0+: 15 µA/MHz ■ Tw o DMA controllers with 16 channels eac.


Cypress CY8C6336

h Memory Subsystem ■ 1-MB application flash, 32-KB auxiliary flash (AUXflash) , and 32-KB supervisory flash (SFlash); read-while-write (RWW) support. Two 8- KB flash caches, one for each CPU. ■ 288-KB SRAM with power and data retenti on control ■ One-time-programmable (O TP) 1-Kb eFuse array Bluetooth Low Ener gy Subsystem ■ 2.4-GHz RF transceiver with 50- antenna drive ■.





Part

CY8C6336

Description

PSoC-63 MCU



Feature


PSoC 6 MCU: CY8C63x6, CY8C63x7 Datasheet PSoC 63 MCU with Bluetooth LE General Description PSoC® 6 MCU is a high-pe rformance, ultra-low-power and secured MCU platform, purpose-built for IoT app lications. The PSoC 63 withBluetooth LE product line, based on the PSoC 6 MCU platform, is a combination of a high-pe rformance microcontroller with low-powe r flash technology,.
Manufacture

Cypress

Datasheet
Download CY8C6336 Datasheet




 CY8C6336
PSoC 6 MCU: CY8C63x6,
CY8C63x7 Datasheet
PSoC 63 MCU with Bluetooth LE
General Description
PSoC® 6 MCU is a high-performance, ultra-low-power and secured MCU platform, purpose-built for IoT applications. The PSoC 63
withBluetooth LE product line, based on the PSoC 6 MCU platform, is a combination of a high-performance microcontroller with
low-power flash technology, digital programmable logic, high-performance analog-to-digital conversion and standard communication
and timing peripherals.
The PSoC 63 product line provides wireless connectivity with Bluetooth LE 5.0 compliance.
Features
32-bit Dual CPU Subsystem
150-MHz Arm® Cortex®-M4F (CM4) CPU with single-cycle
multiply, floating point, and memory protection unit (MPU)
100-MHz Cortex-M0+ (CM0+) CPU with single-cycle multiply
and MPU
User-selectable core logic operation at either 1.1 V or 0.9 V
Active CPU current slope with 1.1-V core operation
Cortex-M4: 40 µA/MHz
Cortex-M0+: 20 µA/MHz
Active CPU current slope with 0.9-V core operation
Cortex-M4: 22 µA/MHz
Cortex-M0+: 15 µA/MHz
Two DMA controllers with 16 channels each
Memory Subsystem
1-MB application flash, 32-KB auxiliary flash (AUXflash), and
32-KB supervisory flash (SFlash); read-while-write (RWW)
support. Two 8-KB flash caches, one for each CPU.
288-KB SRAM with power and data retention control
One-time-programmable (OTP) 1-Kb eFuse array
Bluetooth Low Energy Subsystem
2.4-GHz RF transceiver with 50-antenna drive
Digital PHY
Link Layer engine supporting master and slave modes
Programmable TX power: up to 4 dBm
RX sensitivity: –95 dBm
RSSI: 4-dB resolution
5.7-mA Tx (0 dBm) and 6.7 mA RX (2 Mbps) current with 3.3-V
supply and internal SIMO Buck converter
Link Layer engine supports four connections simultaneously
Supports 2 Mbps data rate
Low-Power 1.7-V to 3.6-V Operation
Six power modes for fine-grained power management
Deep Sleep mode current of 7 µA with 64-KB SRAM retention
On-chip Single-In Multiple Out (SIMO) DC-DC buck converter,
<1 µA quiescent current
Backup domain with 64 bytes of memory and real-time clock
Flexible Clocking Options
8-MHz Internal Main Oscillator (IMO) with ±2% accuracy
Ultra-low-power 32-kHz Internal Low-speed Oscillator (ILO)
On-chip crystal oscillators (16 to 35 MHz, and 32 kHz)
Phase-locked loop (PLL) for multiplying clock frequencies
Frequency-locked loop (FLL) for multiplying IMO frequency
Integer and fractional peripheral clock dividers
Quad SPI (QSPI)/Serial Memory Interface (SMIF)
Execute-In-Place (XIP) from external quad SPI Flash
On-the-fly encryption and decryption
4-KB cache for greater XIP performance with lower power
Supports single, dual, quad, dual-quad, and octal interfaces
with throughput up to 640 Mbps
Segment LCD Drive
Supports up to 83 segments and up to 8 commons
Serial Communication
Nine run-time configurable serial communication blocks
(SCBs)
Eight SCBs: configurable as SPI, I2C, or UART
One Deep Sleep SCB: configurable as SPI or I2C
USB full-speed device interface
Audio Subsystem
Two pulse density modulation (PDM) channels and one I2S
channel with time division multiplexed (TDM) mode
Timing and Pulse-Width Modulation
Thirty-two timer/counter/pulse-width modulators (TCPWM)
Center-aligned, edge, and pseudo-random modes
Comparator-based triggering of Kill signals
Programmable Analog
12-bit 1-Msps SAR ADC with differential and single-ended
modes and 16-channel sequencer with result averaging
Two low-power comparators available in Deep Sleep and
Hibernate modes
Built-in temperature sensor connected to ADC
One 12-bit voltage-mode digital-to-analog converter (DAC) with
< 2-µs settling time
Two opamps with low-power operation modes
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-18787 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 30, 2021




 CY8C6336
PSoC 6 MCU: CY8C63x6,
CY8C63x7 Datasheet
Up to 84 Programmable GPIOs
Two Smart I/O™ ports (16 I/Os) enable Boolean operations on
GPIO pins; available during system Deep Sleep
Programmable drive modes, strengths, and slew rates
Six overvoltage-tolerant (OVT) pins
Capacitive Sensing
Cypress CapSense® provides best-in-class signal-to-noise ratio
(SNR), liquid tolerance, and proximity sensing
Enables dynamic usage of both self and mutual sensing
Automatic hardware tuning (SmartSense™)
Security Built into Platform Architecture
ROM-based root of trust via uninterruptible “Secure Boot”
Step-wise authentication of execution images
Secured execution of code in execute-only mode for protected
routines
All Debug and Test ingress paths can be disabled
Up to eight Protection Contexts
Cryptography Accelerator
Hardware acceleration for symmetric and asymmetric
cryptographic methods and hash functions
True random number generation (TRNG) function
Programmable Digital
Twelve programmable logic blocks, each with 8 Macrocells and
an 8-bit data path (called universal digital blocks or UDBs)
Usable as drag-and-drop Boolean primitives (gates, registers),
or as Verilog-programmable blocks
Cypress-provided peripheral component library using UDBs to
implement functions such as communication peripherals (for
example, LIN, UART, SPI, I2C, S/PDIF and other protocols),
Waveform Generators, Pseudo-Random Sequence (PRS)
generation, and many other functions.
Profiler
Eight counters provide event or duration monitoring of on-chip
resources
Packages
124-BGA and 104-M-CSP; with USB
116-BGA, 104-M-CSP, and 68-QFN; no USB
Document Number: 002-18787 Rev. *O
Page 2 of 85




 CY8C6336
PSoC 6 MCU: CY8C63x6,
CY8C63x7 Datasheet
Contents
Development Ecosystem ................................................. 4
PSoC 6 MCU Resources............................................. 4
ModusToolbox Software.............................................. 5
PSoC Creator™ .......................................................... 6
Blocks and Functionality ................................................. 7
Functional Description..................................................... 9
CPU and Memory Subsystem ..................................... 9
System Resources .................................................... 12
Bluetooth LE Radio and Subsystem.......................... 15
Programmable Analog Subsystem............................ 16
Programmable Digital................................................ 18
Fixed-Function Digital................................................ 18
GPIO ......................................................................... 19
Special-Function Peripherals .................................... 20
Pinouts ............................................................................ 23
Power Supply Considerations....................................... 36
Electrical Specifications ................................................ 41
Absolute Maximum Ratings....................................... 41
Device-Level Specifications ...................................... 41
Analog Peripherals .................................................... 49
Digital Peripherals ..................................................... 58
Memory ..................................................................... 60
System Resources .................................................... 61
Bluetooth LE.............................................................. 69
Ordering Information...................................................... 74
PSoC 6 MPN Decoder .............................................. 75
Packaging........................................................................ 76
Acronyms ........................................................................ 81
Document Conventions ................................................. 83
Unit of Measure ......................................................... 83
Revision History ............................................................. 84
Sales, Solutions, and Legal Information ...................... 85
Worldwide Sales and Design Support....................... 85
Products .................................................................... 85
PSoC® Solutions ...................................................... 85
Cypress Developer Community................................. 85
Technical Support ..................................................... 85
Document Number: 002-18787 Rev. *O
Page 3 of 85




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