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N-Channel MOSFET. 75309 Datasheet

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N-Channel MOSFET. 75309 Datasheet






75309 MOSFET. Datasheet pdf. Equivalent




75309 MOSFET. Datasheet pdf. Equivalent





Part

75309

Description

N-Channel MOSFET



Feature


Data Sheet HUF75309T3ST January 2004 3 A, 55V, 0.070 Ohm, N-Channel UltraFET P ower MOSFET This N-Channel power MOSFET is manufactured using the innovative U ltraFET® process. This advanced proces s technology achieves the lowest possib le on-resistance per silicon area, resu lting in outstanding performance. This device is capable of withstanding high energy in the avala.
Manufacture

Fairchild Semiconductor

Datasheet
Download 75309 Datasheet


Fairchild Semiconductor 75309

75309; nche mode and the diode exhibits very lo w reverse recovery time and stored char ge. It was designed for use in applicat ions where power efficiency is importan t, such as switching regulators, switch ing converters, motor drivers, relay dr ivers, lowvoltage bus switches, and pow er management in portable and battery o perated products. Formerly developmenta l type TA75309. O.


Fairchild Semiconductor 75309

rdering Information PART NUMBER PACKAG E BRAND HUF75309T3ST SOT-223 75309 NOTE: HUF75309T3ST is available only in tape and reel. Features • 3A, 55V Ultra Low On-Resistance, rDS(ON) = 0 .070Ω • Diode Exhibits Both High Sp eed and Soft Recovery • Temperature C ompensating PSPICE® Model • Thermal Impedance SPICE Model • Peak Current vs Pulse Width Curve • UIS Rating.


Fairchild Semiconductor 75309

Curve • Related Literature - TB334, Guidelines for Soldering Surface Moun t Components to PC Boards” Symbol D G S Packaging SOT-223 GATE DRAIN SOUR CE DRAIN (FLANGE) Product reliability information can be found at http://www .fairchildsemi.com/products/discrete/re liability/index.html For severe environ ments, see our Automotive HUFA series. All Fairchild semiconduc.

Part

75309

Description

N-Channel MOSFET



Feature


Data Sheet HUF75309T3ST January 2004 3 A, 55V, 0.070 Ohm, N-Channel UltraFET P ower MOSFET This N-Channel power MOSFET is manufactured using the innovative U ltraFET® process. This advanced proces s technology achieves the lowest possib le on-resistance per silicon area, resu lting in outstanding performance. This device is capable of withstanding high energy in the avala.
Manufacture

Fairchild Semiconductor

Datasheet
Download 75309 Datasheet




 75309
Data Sheet
HUF75309T3ST
January 2004
3A, 55V, 0.070 Ohm, N-Channel UltraFET
Power MOSFET
This N-Channel power MOSFET is
manufactured using the innovative
UltraFET® process. This advanced
process technology achieves the
lowest possible on-resistance per silicon area, resulting in
outstanding performance. This device is capable of
withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery operated products.
Formerly developmental type TA75309.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75309T3ST SOT-223
75309
NOTE: HUF75309T3ST is available only in tape and reel.
Features
• 3A, 55V
• Ultra Low On-Resistance, rDS(ON) = 0.070
• Diode Exhibits Both High Speed and Soft Recovery
• Temperature Compensating PSPICE® Model
• Thermal Impedance SPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
SOT-223
GATE
DRAIN
SOURCE
DRAIN
(FLANGE)
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2004 Fairchild Semiconductor Corporation
HUF75309T3ST Rev. B1




 75309
HUF75309T3ST
Absolute Maximum Ratings TA = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (Note 2) (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . .TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . Tpkg
HUF75309T3ST
55
55
±20V
3
Figure 5
Figures 6, 14, 15
1.1
9.09
-55 to 150
300
260
UNITS
V
V
V
A
W
mW/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TA = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Drain to Source Breakdown Voltage
Gate to Source Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
BVDSS ID = 250µA, VGS = 0V (Figure 11)
55
VGS(TH) VGS = VDS, ID = 250µA (Figure 10)
2
IDSS
VDS = 50V, VGS = 0V
-
VDS = 45V, VGS = 0V, TA = 150oC
-
IGSS
VGS = ±20V
-
rDS(ON) ID = 3A, VGS = 10V (Figure 9)
-
tON
VDD = 30V, ID 3A, RL = 10,
-
td(ON)
VGS = 10V, RGS = 28
-
tr
-
td(OFF)
-
tf
-
tOFF
-
Qg(TOT) VGS = 0V to 20V VDD = 30V, ID 3A,
-
Qg(10)
Qg(TH)
VGS = 0V to 10V
VGS = 0V to 2V
RL = 10
Ig(REF) = 1.0mA
(Figure 13)
-
-
Gate to Source Gate Charge
Qgs
-
Gate to Drain “Miller” Charge
Qgd
-
Input Capacitance
Output Capacitance
CISS
VDS = 25V, VGS = 0V, f = 1MHz
-
COSS
(Figure 12)
-
Reverse Transfer Capacitance
CRSS
-
Thermal Resistance Junction to Ambient
RθJA
Pad Area = 0.164 in2 (See note 2)
-
Pad Area = 0.068 in2 (See TB377)
-
Pad Area = 0.026 in2 (See TB377)
-
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Source to Drain Diode Voltage
VSD
ISD = 3A
-
Reverse Recovery Time
trr
ISD = 3A, dISD/dt = 100A/µs
-
Reverse Recovered Charge
QRR
ISD = 3A, dISD/dt = 100A/µs
-
NOTE:
2. 110oC/W measured using FR-4 board with 0.164 in2 footprint for 1000 seconds.
TYP
-
-
-
-
-
0.057
-
8
20
12
28
-
19
10.7
0.71
1.40
4.80
352
146
30
-
-
-
MAX
-
4
1
250
100
0.070
45
-
-
-
-
65
23
13
0.85
-
-
-
-
-
110
126
143
UNITS
V
V
µA
µA
nA
ns
ns
ns
ns
ns
ns
nC
nC
nC
nC
nC
pF
pF
pF
oC/W
oC/W
oC/W
TYP
MAX UNITS
-
1.25
V
-
41
ns
-
59
nC
©2004 Fairchild Semiconductor Corporation
HUF75309T3ST Rev. B1




 75309
Typical Performance Curves
HUF75309T3ST
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT
TEMPERATURE
4
RθJA = 110oC/W
3
2
1
0
25
50
75
100
125
150
TA, AMBIENT TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.1 0.01
0.01
0.001
10-5
PDM
SINGLE PULSE
10-4
10-3
10-2
10-1
100
t, RECTANGULAR PULSE DURATION (s)
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
101
102
103
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
100
TJ = MAX RATED
TA = 25oC
RθJA = 110oC/W
10
100µs
1ms
1
10ms
OPERATION IN THIS
AREA MAY BE
0.1 LIMITED BY rDS(ON)
VDSS(MAX) = 55V
1
10
100 200
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
©2004 Fairchild Semiconductor Corporation
50
TA = 25oC
RθJA = 110oC/W
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
150 - TA
125
10
1
10-3
10-2
10-1
100
101
102
103
t, PULSE WIDTH (s)
FIGURE 5. PEAK CURRENT CAPABILITY
HUF75309T3ST Rev. B1



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