DatasheetsPDF.com

FREQUENCY DETECTOR. TLC2934 Datasheet

DatasheetsPDF.com

FREQUENCY DETECTOR. TLC2934 Datasheet






TLC2934 DETECTOR. Datasheet pdf. Equivalent




TLC2934 DETECTOR. Datasheet pdf. Equivalent





Part

TLC2934

Description

PHASE FREQUENCY DETECTOR



Feature


TLC2934 3.3 V 130 MHZ VCO, PHASE FREQUEN CY DETECTOR D Voltage-Controlled Oscil lator (VCO) – Ring Oscillator Using O nly One External Biasing Resistor (RBIA S) D Recommended Lock Frequency – 100 MHz to 130 MHz – (VDD = 3.3 V + 5%, TA = –20°C to 75°C) D Phase-Frequen cy Detector (PFD) Includes a High-Speed Edge-Triggered Detector With Internal Charge Pump D Independent VC.
Manufacture

Texas Instruments

Datasheet
Download TLC2934 Datasheet


Texas Instruments TLC2934

TLC2934; O, PFD Power-Down Mode D Thin Small-Outl ine Package (14 Terminal) D Compatible Pin Assignment to TLC2932, TLC2933 LOG IC VDD SELECT VCO OUT FIN -A FIN -B PFD OUT LOGIC GND SLAS306 – NOVEMBER 20 00 PW PACKAGE (TOP VIEW) 1 14 VCO V DD 2 13 RBIAS 3 12 VCO IN 4 11 VCO GND 5 10 VCO INHIBIT 6 9 PFD INHIBIT 7 8 TEST description The T LC2934, a mixed sign.


Texas Instruments TLC2934

al IC designed for phase-locked-loop (PL L) systems, is composed of a voltage-co ntrolled oscillator (VCO) and an edge-t riggered-type phase frequency detector (PFD). The internal VCO is based on the TLC2932 and TLC2933s ring oscillator. It oscillates in wider frequency with l ower supply voltage, and it has stable oscillating performance. The oscillatio n function, provid.


Texas Instruments TLC2934

ed by only one external resistor connect ion, supplies bias to the VCI internal circuit. Oscillator range is covered fr om 10 MHz to 130 MHz with a 3.3-V suppl y voltage. The VCO has an inhibit funct ion to stop oscillation and for the pow er-down mode. The internal PFD, a high- speed rising edge triggered type, has a n internal charge pump with a high-impe dance output buffe.

Part

TLC2934

Description

PHASE FREQUENCY DETECTOR



Feature


TLC2934 3.3 V 130 MHZ VCO, PHASE FREQUEN CY DETECTOR D Voltage-Controlled Oscil lator (VCO) – Ring Oscillator Using O nly One External Biasing Resistor (RBIA S) D Recommended Lock Frequency – 100 MHz to 130 MHz – (VDD = 3.3 V + 5%, TA = –20°C to 75°C) D Phase-Frequen cy Detector (PFD) Includes a High-Speed Edge-Triggered Detector With Internal Charge Pump D Independent VC.
Manufacture

Texas Instruments

Datasheet
Download TLC2934 Datasheet




 TLC2934
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
D Voltage-Controlled Oscillator (VCO)
Ring Oscillator Using Only One
External Biasing Resistor (RBIAS)
D Recommended Lock Frequency
– 100 MHz to 130 MHz
– (VDD = 3.3 V + 5%, TA = –20°C to 75°C)
D Phase-Frequency Detector (PFD)
Includes a High-Speed Edge-Triggered
Detector With Internal Charge Pump
D Independent VCO, PFD Power-Down
Mode
D Thin Small-Outline Package (14
Terminal)
D Compatible Pin Assignment to
TLC2932, TLC2933
LOGIC VDD
SELECT
VCO OUT
FIN -A
FIN -B
PFD OUT
LOGIC GND
SLAS306 – NOVEMBER 2000
PW PACKAGE
(TOP VIEW)
1
14
VCO VDD
2
13
RBIAS
3
12
VCO IN
4
11
VCO GND
5
10
VCO INHIBIT
6
9
PFD INHIBIT
7
8
TEST
description
The TLC2934, a mixed signal IC designed for phase-locked-loop (PLL) systems, is composed of a
voltage-controlled oscillator (VCO) and an edge-triggered-type phase frequency detector (PFD).
The internal VCO is based on the TLC2932 and TLC2933s ring oscillator. It oscillates in wider frequency with
lower supply voltage, and it has stable oscillating performance. The oscillation function, provided by only one
external resistor connection, supplies bias to the VCI internal circuit. Oscillator range is covered from 10 MHz
to 130 MHz with a 3.3-V supply voltage. The VCO has an inhibit function to stop oscillation and for the
power-down mode.
The internal PFD, a high-speed rising edge triggered type, has an internal charge pump with a high-impedance
output buffer. The PFD detects phase difference between the reference frequency input and the signal
frequency input from the VCO output through an external counter device. This functions the same as TLC2932
and TLC2933. The PFD also has the inhibit function for stop phase comparison and for power-down mode.
block diagram
f(OSC)
Through
or 1/2
TLC29341PW
VCO
Ring
Oscillator
Bias
Control
PFD OUT
Ring
Oscillator
PFD
Bias Supply
Control Voltage
VCO INHIBIT
Reference Input
Comparison Input
PFD INHIBIT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2000, Texas Instruments Incorporated
1




 TLC2934
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
Terminal Functions
TERMINAL
NAME
NO.
FIN-A,
4
FIN-B
5
LOGIC GND
7
LOGIC VDD
1
PFD INHIBIT
9
PFD OUT
6
RBIAS
13
SELECT
2
TEST
8
VCO GND
11
VCO OUT
3
VCO INHIBIT
10
VCO IN
12
VCO VDD
14
I/O
DESCRIPTION
I Frequency signal inputs for PFD. The reference frequency signal (fREF-IN) and the VCO output signal
through the external counter device are applied to these terminals. When the LPF design is the lag-lead filter
(passive filter and noninverting), f(REF-IN) is input to FIN-A, and the VCO output signal is to FIN-B.
GND terminal for the internal logic circuit
Power supply terminal for the internal logic circuit. This power supply terminal separates from VCO VDD to
reduce cross-coupling between supplies.
I PFD INHIBIT (power-down) control signal input terminal
O PFD output terminal. When PFD INHIBIT is high, PFD OUT is in the high-impedance state.
I Bias resistor (RBIAS) terminal. Connect a resistor between VCO GND and this terminal to supply bias to
internal VCO circuit. TLC2934 bias resistor connection is different from TLC2932 and TLC2933, where bias
resistor RBIAS is connected to VCO VDD.
I 1/2 divider select terminal. L=through output, H=1/2 output.
Test terminal. Use for production test. Tie to GND when in normal use.
GND terminal for internal VCO
O VCO output terminal. When VCO INHIBIT = high, VCO OUT is low.
I VCO INHIBIT (power-down) control signal input terminal
I VCO control voltage input terminal. Normally, The external LPF is connected to this terminal.
Power supply terminal for the internal VCO circuit. This power supply terminal should be separate from
LOGIC VDD to reduce cross-coupling between supplies.
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage (each supply), VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4 V
Input voltage range (each input), VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VDD + 0.5 V
Input current (each input), II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output current (each output), IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous total power dissipation at (or below) TA = 25_C (see Note 2), PD . . . . . . . . . . . . . . . . . . . 700 mW
Operating free-air temperature range. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 20°C to 75°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to network ground terminal.
2. For operation above 25°C free–air temperature, derate linearly at the rate of 5.6 mW/°C
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 TLC2934
TLC2934
3.3 V 130 MHZ VCO, PHASE FREQUENCY DETECTOR
SLAS306 – NOVEMBER 2000
recommended operating conditions
MIN TYP MAX UNIT
Supply voltage (each supply, VDD (see Notes 3 and 4)
3.15 3.3 3.45 V
Input voltage (each input except for VCO IN, VI
0
VDD V
Output current (each output), IO
0
±2 mA
VCO control voltage, VCO IN
0.5
VDD V
RBIAS = 1 k
36
130 MHz
Lock frequency (through output)
RBIAS = 1.8 k
RBIAS = 2.4 k
28
90
26
80
RBIAS = 3.3 k
20
60
RBIAS = 1 k
18
65 MHz
Lock frequency (1/2 output)
RBIAS = 1.8 k
RBIAS = 2.4 k
14
45
13
40
RBIAS = 3.3 k
10
30
Bias resistor, RBIAS
1.0
3.3 K
Operating temperature range, TA
–20
75 _C
VCO IN voltage at VCO INHIBIT, V(CINH) (see Note 5)
0 0.5 V
NOTES: 3. It is recommended that the logic supply terminal (LOGIC VDD) and the VCO supply terminal (VCO VDD) be at the same voltage and
separated from each other.
4. A bypass capacitor is placed as close as possible to each supply terminal.
5. For stable restart of VCO, VCOIN is 0 V when VCO INHIBIT is pulled down to GND level to disable the VCO INHIBIT function. And
also, VCO IN should be 0 V when the operation will be started by supplying the power.
electrical characteristics over recommended operating free-air temperature range, VDD=3.3 V
(unless otherwise noted)
VCO
PARAMETER
TEST CONDITIONS
MIN TYP
VOH
High-level output voltage
IOH = –2 mA
3.1
VOL
Low-level output voltage
IOL= 2 mA
VIH
High-level input voltage
Logic signal input
2.3
VIL
Low-level input voltage
Logic signal input
II
Input current at TEST, VCO INHIBIT
VI = VDD or GND
ZV(CO IN) Input impedance at VCOIN
VCOIN = 1/2 VDD
10
IDD(INH)
VCO supply current (inhibit)
See Note 6
0.01
IDD(VCO) VCO supply current
See Note 7
10
NOTES: 6. Current into VCO VDD, when VCO INHIBIT = VDD, PFD is inhibited.
7. Current into VCO VDD, when VCOIN = 1/2 VDD, RBIAS = 1 k, VCO INHIBIT = GND, PFD is inhibited.
MAX
0.2
1.0
±1
1
15
UNIT
V
V
V
V
µA
M
µA
mA
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3



Recommended third-party TLC2934 Datasheet






@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)