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VOLTAGE-CONTROLLED OSCILLATOR. TLC2940 Datasheet

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VOLTAGE-CONTROLLED OSCILLATOR. TLC2940 Datasheet






TLC2940 OSCILLATOR. Datasheet pdf. Equivalent




TLC2940 OSCILLATOR. Datasheet pdf. Equivalent





Part

TLC2940

Description

HIGH-PERFORMANCE CMOS VOLTAGE-CONTROLLED OSCILLATOR



Feature


TLC2940 HIGH-PERFORMANCE CMOS VOLTAGE-CO NTROLLED OSCILLATOR D Stable Oscillati on Using External Resistor D Lock Frequ ency Range: – 35 MHz to 75 MHz (VDD = 5 V ± 0.25 V, TA = – 20°C to 85°C ) – 28 MHz to 50 MHz (VDD = 3 V ± 0. 15 V, TA = – 20°C to 85°C) D Operat ing Free-Air Temperature Range, TA = 20°C to 85°C D 8-Pin Thin Shrinked Small-Outline Package LOGIC VDD VCO.
Manufacture

Texas Instruments

Datasheet
Download TLC2940 Datasheet


Texas Instruments TLC2940

TLC2940; OUT FREFINPUT PFD OUT SLAS244 – OCTO BER 1999 PW PACKAGE (TOP VIEW) 1 8 VCO VDD 2 7 BIAS 3 6 VCOIN 4 5 GND description The TLC2940 is a high -performance analog voltage-controlled oscillator (VCO) using Texas Instrument s 0.8-µm CMOS process. The VCO oscilla ting operation can be performed by an e xternal bias resistor connected to the internal oscillation .


Texas Instruments TLC2940

circuitry, and the oscillation frequency range is set by this bias resistor. Th e lock frequency range for PLL applicat ions is from 35 MHz to 75 MHz (over ope rating free-air temperature range, VDD = 5 V ± 5%), and from 28 MHz to 50 MHz (over operating free-air temperature r ange, VDD = 3 V ± 5%). The stable anal og PLL can be configured within these f requency ranges. The.


Texas Instruments TLC2940

device is available in an 8-pin TSSOP s urface-mount package. The PLL block is configured using a counter, a required LPF, and a phase frequency detector (PF D). AVAILABLE OPTIONS PACKAGE TA TS SOP (PW) – 20°C to 85°C TLC2940I PW functional block diagram BIAS RESI STOR VCO CONTROL VCOIN Bias Circuit VCO OUT TLC2940 VCO BIAS Output Buff er VCO OUT VCOIN Pl.

Part

TLC2940

Description

HIGH-PERFORMANCE CMOS VOLTAGE-CONTROLLED OSCILLATOR



Feature


TLC2940 HIGH-PERFORMANCE CMOS VOLTAGE-CO NTROLLED OSCILLATOR D Stable Oscillati on Using External Resistor D Lock Frequ ency Range: – 35 MHz to 75 MHz (VDD = 5 V ± 0.25 V, TA = – 20°C to 85°C ) – 28 MHz to 50 MHz (VDD = 3 V ± 0. 15 V, TA = – 20°C to 85°C) D Operat ing Free-Air Temperature Range, TA = 20°C to 85°C D 8-Pin Thin Shrinked Small-Outline Package LOGIC VDD VCO.
Manufacture

Texas Instruments

Datasheet
Download TLC2940 Datasheet




 TLC2940
TLC2940
HIGH-PERFORMANCE CMOS VOLTAGE-CONTROLLED OSCILLATOR
D Stable Oscillation Using External Resistor
D Lock Frequency Range:
– 35 MHz to 75 MHz (VDD = 5 V ± 0.25 V,
TA = – 20°C to 85°C)
– 28 MHz to 50 MHz (VDD = 3 V ± 0.15 V,
TA = – 20°C to 85°C)
D Operating Free-Air Temperature Range,
TA = – 20°C to 85°C
D 8-Pin Thin Shrinked Small-Outline Package
LOGIC VDD
VCO OUT
FREFINPUT
PFD OUT
SLAS244 – OCTOBER 1999
PW PACKAGE
(TOP VIEW)
1
8
VCO VDD
2
7
BIAS
3
6
VCOIN
4
5
GND
description
The TLC2940 is a high-performance analog voltage-controlled oscillator (VCO) using Texas Instruments
0.8-µm CMOS process. The VCO oscillating operation can be performed by an external bias resistor connected
to the internal oscillation circuitry, and the oscillation frequency range is set by this bias resistor. The lock
frequency range for PLL applications is from 35 MHz to 75 MHz (over operating free-air temperature range,
VDD = 5 V ± 5%), and from 28 MHz to 50 MHz (over operating free-air temperature range, VDD = 3 V ± 5%).
The stable analog PLL can be configured within these frequency ranges.
The device is available in an 8-pin TSSOP surface-mount package.
The PLL block is configured using a counter, a required LPF, and a phase frequency detector (PFD).
AVAILABLE OPTIONS
PACKAGE
TA
TSSOP
(PW)
– 20°C to 85°C
TLC2940IPW
functional block diagram
BIAS
RESISTOR
VCO CONTROL
VCOIN
Bias
Circuit
VCO OUT
TLC2940
VCO
BIAS
Output
Buffer
VCO OUT
VCOIN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1999, Texas Instruments Incorporated
1




 TLC2940
TLC2940
HIGH-PERFORMANCE CMOS VOLTAGE-CONTROLLED OSCILLATOR
SLAS244 – OCTOBER 1999
Terminal Functions
TERMINAL
I/O{
NAME
NO.
DESCRIPTION
BIAS
FREFINPUT
7
M Bias supply terminal for internal VCO. The resistor should be located between VDD and this terminal.
3
I Not used. This terminal should be tied to ground.
GND
5 PS Ground
LOGIC VDD
1 PS Power supply for the internal logic circuitry (PFD portion, input/output portion). It is recommended that this
terminal is separated from the VCO supply voltage terminal.
PFD OUT
4
O Not used. This terminal should be unconnected (open).
VCOIN
6
I VCO control voltage input.
VCO OUT
2
O VCO output. This terminal is tied to a low level at inhibit status.
VCO VDD
8 PS Supply voltage for VCO analog portion.
I: Input, O: Output, PS: Power supply/GND, M: Others
detailed description
The TLC2940 is an analog VCO IC that generates a frequency that is a multiple of a reference frequency for
a PLL block configuration. Normally, a PLL block is composed of a VCO, a phase frequency detector, counter
logic, and a loop filter.
The following is a description for the analog VCO of the TLC2940.
The built-in analog VCO is composed of a ring oscillator portion for oscillation operation and a bias control
portion to generate a bias level to supply to the ring oscillator. The oscillation operation is performed by a bias
resistor (RBIAS) connected between the bias control (pin 7) and the supply voltage (pin 8). The VCO oscillation
frequency is determined by this resistor value, RBIAS, that is, the oscillation frequency decreases as the resistor
value increases, and the oscillation frequency increases as the resistor value decreases. The lock frequency
range is from 35 MHz to 75 MHz with a RBIAS of 1.5 kto 4.3 kat 5-V operation and from 28 MHz to 50 MHz
with a RBIAS of 1.5 kto 2.7 kat 3-V operation over the recommended supply voltage and operating free-air
temperature range.
Refer to the curves shown in the typical characteristics section for the lock frequency ranges with varying RBIAS
values.
VCO Oscillation
VCO Oscillation Frequency Range
Bias Resistor (RBIAS)
VCO Control Voltage (VCOIN)
Figure 1. VCO Oscillation Frequency Range Setting
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 TLC2940
TLC2940
HIGH-PERFORMANCE CMOS VOLTAGE-CONTROLLED OSCILLATOR
SLAS244 – OCTOBER 1999
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage (any supply), VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage range (any input), VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VDD + 0.5 V
Input current (any input), II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output current (any output), IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Continuous total power dissipation (TA = 25°C or below), PD (see Note 2) . . . . . . . . . . . . . . . . . . . . . . 700 mW
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 20°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to network GND terminals.
2. For operation above 25°C free-air temperature, derate linearly at the rate of 5.6 mW/°C.
recommended operating conditions
PARAMETER
MIN NOM
MAX UNIT
3-V operation
Supply voltage, VDD (any supply, see Notes 3 and 4) 5-V operation
2.85
3
3.15
V
4.75
5
5.25
Input voltage, VI (inputs except VCO IN)
Output current, IO (any output)
VCO control voltage at VCO IN
Lock frequency
3-V operation
5-V operation
RBIAS = 1.5 k
RBIAS = 1.8 k
RBIAS = 2.2 k
RBIAS = 2.7 k
RBIAS = 1.5 k
RBIAS = 2.4 k
RBIAS = 3.3 k
RBIAS = 4.3 k
0
VDD V
0
± 2 mA
1
VDD–0.5 V
42
50
37
47
33
45
28
42
MHz
65
75
50
65
43
56
35
50
VCO oscillation frequency setting resistor, RBIAS
3-V operation
5-V operation
1.5
2.7
k
1.5
4.3
Operating free-air temperature, TA
–20
85 °C
NOTES:
3. It is recommended that the logic supply terminal (LOGIC VDD) and the VCO supply terminal (VCO VDD) should be at the same voltage
and separate from each other.
4. The bypass capacitor should be located as close as possible to each power supply.
5. The FREFINPUT (pin 3) and PFD OUT (pin 4) terminals are input/output terminals preset for logic function respectively. In normal
operation, the FREFINPUT shoud be tied to GND and PDF OUT should be left unconnected (open).
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3



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