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54ACT16374 Datasheet, Equivalent, EDGE-TRIGGERED FLIP-FLOPS.16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS |
| Part | 54ACT16374 |
|---|---|
| Description | 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS |
| Feature | SN54ACT16374, 74ACT16374 16-BIT D-TYPE E DGE-TRIGGERED FLIP-FLOPS WITH 3-STATE O UTPUTS SCAS124B – MARCH 1990 – REVI SED APRIL 1996 D Members of the Texas Instruments Widebust Family D Inputs Ar e TTL-Voltage Compatible D 3-State Bus- Driving True Outputs D Flow-Through Arc hitecture Optimizes PCB Layout D Distri buted Center-Pin VCC and GND Configurat ions Minimize High-Speed Switching Nois e D EPICt (Enhanced-Performance Implant ed CMOS) 1-mm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package O ptions Include Plastic 300-mil Shrink S mall-Outline (DL) Packages Using 25-mil Center-to-Center P . |
| Manufacture | Texas Instruments |
| Datasheet |
| Part | 54ACT16374 |
|---|---|
| Description | 16-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS |
| Feature | SN54ACT16374, 74ACT16374 16-BIT D-TYPE E DGE-TRIGGERED FLIP-FLOPS WITH 3-STATE O UTPUTS SCAS124B – MARCH 1990 – REVI SED APRIL 1996 D Members of the Texas Instruments Widebust Family D Inputs Ar e TTL-Voltage Compatible D 3-State Bus- Driving True Outputs D Flow-Through Arc hitecture Optimizes PCB Layout D Distri buted Center-Pin VCC and GND Configurat ions Minimize High-Speed Switching Nois e D EPICt (Enhanced-Performance Implant ed CMOS) 1-mm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package O ptions Include Plastic 300-mil Shrink S mall-Outline (DL) Packages Using 25-mil Center-to-Center P . |
| Manufacture | Texas Instruments |
| Datasheet |
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