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Volume Control. CS4341A Datasheet

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Volume Control. CS4341A Datasheet
















CS4341A Control. Datasheet pdf. Equivalent













Part

CS4341A

Description

24-Bit / 192 kHz Stereo DAC with Volume Control



Feature


CS4341A 24-Bit, 192 kHz Stereo DAC with Volume Control Features z 101 dB Dyna mic Range z -91 dB THD+N z +3.3 V or +5 V Power Supply z 50 mW with 3.3 V supp ly z Low Clock Jitter Sensitivity z Fil tered Line-level Outputs z On-Chip Digi tal De-emphasis for 32, 44.1, and 48 kH z z ATAPI Mixing z Digital Volume Contr ol with Soft Ramp – 94 dB Attenuation – 1 dB Step Size – .
Manufacture

Cirrus Logic

Datasheet
Download CS4341A Datasheet


Cirrus Logic CS4341A

CS4341A; Zero Crossing Click-Free Transitions z U p to 200-kHz Sample Rates z Automatic M ode Detection for Sample Rates between 4 and 200 kHz z Pin Compatible with the CS4341 Description The CS4341A is a c omplete stereo digital-to-analog system including digital interpolation, fourt h-order deltasigma digital-to-analog co nversion, digital de-emphasis, volume c ontrol, channel mi.


Cirrus Logic CS4341A

xing and analog filtering. The advantage s of this architecture include: ideal d ifferential linearity, no distortion me chanisms due to resistor matching error s, no linearity drift over time and tem perature and a high tolerance to clock jitter. The CS4341A accepts data at all standard audio sample rates up to 192 kHz, consumes very little power, operat es over a wide pow.


Cirrus Logic CS4341A

er supply range and is pin compatible wi th the CS4341, as described in section 3.1. These features are ideal for DVD a udio players. ORDERING INFORMATION CS 4341A-KS 16-pin SOIC, -10 to 70 °C C S4341A-KSZ, Lead Free 16-pin SOIC, -10 to 70 °C CDB4341A Evaluation Board RST SCLK LRCK SDIN Serial Audio Interf ace SCL/CCLK SDA/CDIN AD0/CS MUTEC C ontrol Port Interfac.





Part

CS4341A

Description

24-Bit / 192 kHz Stereo DAC with Volume Control



Feature


CS4341A 24-Bit, 192 kHz Stereo DAC with Volume Control Features z 101 dB Dyna mic Range z -91 dB THD+N z +3.3 V or +5 V Power Supply z 50 mW with 3.3 V supp ly z Low Clock Jitter Sensitivity z Fil tered Line-level Outputs z On-Chip Digi tal De-emphasis for 32, 44.1, and 48 kH z z ATAPI Mixing z Digital Volume Contr ol with Soft Ramp – 94 dB Attenuation – 1 dB Step Size – .
Manufacture

Cirrus Logic

Datasheet
Download CS4341A Datasheet




 CS4341A
CS4341A
24-Bit, 192 kHz Stereo DAC with Volume Control
Features
z 101 dB Dynamic Range
z -91 dB THD+N
z +3.3 V or +5 V Power Supply
z 50 mW with 3.3 V supply
z Low Clock Jitter Sensitivity
z Filtered Line-level Outputs
z On-Chip Digital De-emphasis for 32, 44.1,
and 48 kHz
z ATAPI Mixing
z Digital Volume Control with Soft Ramp
– 94 dB Attenuation
– 1 dB Step Size
– Zero Crossing Click-Free Transitions
z Up to 200-kHz Sample Rates
z Automatic Mode Detection for Sample Rates
between 4 and 200 kHz
z Pin Compatible with the CS4341
Description
The CS4341A is a complete stereo digital-to-analog sys-
tem including digital interpolation, fourth-order delta-
sigma digital-to-analog conversion, digital de-emphasis,
volume control, channel mixing and analog filtering. The
advantages of this architecture include: ideal differential
linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and tempera-
ture and a high tolerance to clock jitter.
The CS4341A accepts data at all standard audio sample
rates up to 192 kHz, consumes very little power, oper-
ates over a wide power supply range and is pin
compatible with the CS4341, as described in section 3.1.
These features are ideal for DVD audio players.
ORDERING INFORMATION
CS4341A-KS
16-pin SOIC, -10 to 70 °C
CS4341A-KSZ, Lead Free 16-pin SOIC, -10 to 70 °C
CDB4341A
Evaluation Board
RST
SCLK
LRCK
SDIN
SCL/CCLK SDA/CDIN AD0/CS
MUTEC
Control Port
Interface
External
Mute Control
Interpolation Filter
Volume Control
∆Σ DAC
Analog Filter
AO UTA
Mixer
Interpolation Filter
Volume Control
∆Σ DAC
Analog Filter
AO UTB
÷2
MCLK
Cirrus Logic, Inc.
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2004
(All Rights Reserved)
JUL ‘04
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 CS4341A
CS4341A
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................... 5
2. TYPICAL CONNECTION DIAGRAM ...................................................................................... 6
3. APPLICATIONS ........................................................................................................................ 7
3.1 Upgrading from the CS4341 to the CS4341A .................................................................... 7
3.2 Sample Rate Range/Operational Mode Detect .................................................................. 7
3.2.1 Auto-Detect Enabled ............................................................................................. 7
3.2.2 Auto-Detect Disabled ............................................................................................ 7
3.3 System Clocking ................................................................................................................ 8
3.4 Digital Interface Format ...................................................................................................... 8
3.5 De-Emphasis Control ......................................................................................................... 9
3.6 Recommended Power-up Sequence ................................................................................. 9
3.7 Popguard® Transient Control ........................................................................................... 10
3.7.1 Power-up ............................................................................................................. 10
3.7.2 Power-down ........................................................................................................ 10
3.7.3 Discharge Time ................................................................................................... 10
3.8 Grounding and Power Supply Arrangements .................................................................. 10
3.9 Control Port Interface ....................................................................................................... 11
3.9.1 Rise Time for Control Port Clock ......................................................................... 11
3.9.2 MAP Auto Increment ........................................................................................... 11
3.9.3 I2C Mode ............................................................................................................. 12
3.9.3a I2C Write ............................................................................................... 12
3.9.3b I2C Read .............................................................................................. 13
3.9.4 SPI Mode ............................................................................................................ 14
3.9.4a SPI Write .............................................................................................. 14
3.10 Memory Address Pointer (MAP) .............................................................................. 15
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its
subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is
provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders,
that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment,
including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of
this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and
by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual
property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within
your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution,
advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED
FOR USE IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, LIFE SUPPORT PRODUCTS
OR OTHER CRITICAL APPLICATIONS (INCLUDING MEDICAL DEVICES, AIRCRAFT SYSTEMS OR COMPONENTS AND PERSONAL OR AUTOMOTIVE
SAFETY OR SECURITY DEVICES). INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOM-
ER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF
THE CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER
AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM
ANY AND ALL LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Purchase of I2C components of Cirrus Logic, Inc., or one of its sublicensed Associated Companies conveys a license under the Phillips I2C Patent Rights to use
those components in a standard I2C system.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trade-
marks or service marks of their respective owners.
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 CS4341A
CS4341A
3.10.1 INCR (Auto Map Increment Enable) ............................................................................ 15
3.10.2 MAP (Memory Address Pointer) .................................................................................. 15
4. REGISTER QUICK REFERENCE .......................................................................................... 16
5. REGISTER DESCRIPTION .................................................................................................... 17
5.1 Mode Control 1 (address 00h) .......................................................................................... 17
5.2 Mode Control 2 (address 01h) .......................................................................................... 17
5.3 Transition and Mixing Control (address 02h).................................................................... 19
5.4 Channel A Volume Control (address 03h) ........................................................................ 22
5.5 Channel B Volume Control (address 04h) ........................................................................ 22
6. CHARACTERISTICS AND SPECIFICATIONS ...................................................................... 23
SPECIFIED OPERATING CONDITIONS ............................................................................. 23
ABSOLUTE MAXIMUM RATINGS ......................................................................................... 23
ANALOG CHARACTERISTICS (CS4341A-KS) ..................................................................... 24
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ........................ 26
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE .......................................... 29
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 30
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 31
DC ELECTRICAL CHARACTERISTICS ................................................................................ 32
DIGITAL INPUT CHARACTERISTICS ................................................................................... 32
DIGITAL INTERFACE SPECIFICATIONS ............................................................................. 32
7. PARAMETER DEFINITIONS .................................................................................................. 33
Total Harmonic Distortion + Noise (THD+N) .......................................................................... 33
Dynamic Range ...................................................................................................................... 33
Interchannel Isolation ............................................................................................................. 33
Interchannel Gain Mismatch ................................................................................................... 33
Gain Error ............................................................................................................................... 33
Gain Drift ................................................................................................................................ 33
8. REFERENCES ........................................................................................................................ 33
9. PACKAGE DIMENSIONS ...................................................................................................... 34
THERMAL CHARACTERISTICS AND SPECIFICATIONS .................................................... 34
DS582F2
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