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10MSPS ADC. BL8531H Datasheet

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10MSPS ADC. BL8531H Datasheet
















BL8531H ADC. Datasheet pdf. Equivalent













Part

BL8531H

Description

12 Bit 10MSPS ADC



Feature


BL8531H AFE FOR CCD/CIS SIGNAL PROCESSO R GENERAL DESCRIPTION The samsung anal og front end(AFE) for CCD/CIS image sig nal is an integrated analog signal proc essor for color image signal. The AFE c onverts CCD/CIS output signal to digita l data. The AFE includes three-channel CDS(Correlated Double Sampling) circuit , PGA(Programmable Gain Amplifier), and 12-bit analog to .
Manufacture

Samsung

Datasheet
Download BL8531H Datasheet


Samsung BL8531H

BL8531H; digital converter with reference generat or. A parallel data bus provides a simp le interface to 8-bit microcontroller. APPLICATIONS • • • • Color and B/W Scanner Digital Copiers Facsimile General Purpose CCD/CIS imager FETURES • • • • • • • • • 12-bit 6MSPS A/D Converter Integrated Triple Correlated Double Sampler 3-Cha nnel 2 MSPS Color Mode Analog Programmble Gain.


Samsung BL8531H

Amplifier Internal Voltage Reference Wi de clamp level controllability for CIS sensor No Missing Code Guaranteed Micro controller-Compatible Control Interface Operation by Single 5V Supply CMOS Low Power Dissipation KEY SPECIFICATION • • • Resolution: 12-bit Conve rsion Rate: 6 MHz(2 MHz*3) Supply Volta ge: 5 V ± 5% Power Dissipation: 375 mW (Typical) 1 AFE FOR CCD/C.


Samsung BL8531H

IS SIGNAL PROCESSOR BL8531H FUNCTIONAL BLOCK DIAGRAM RED CDS PGA REF GREEN I NPUT OFFSET REGISTER CDS PGA MUX ADC D[ 11:0] MPU PORT BLUE CDS PGA GAIN REGIS TER Ver 2.0 (Apr. 2002) No responsibil ity is assumed by SEC for its use nor f or any infringements of patents or othe r rights of third parties that may resu lt from its use. The content of this da tasheet is subject.





Part

BL8531H

Description

12 Bit 10MSPS ADC



Feature


BL8531H AFE FOR CCD/CIS SIGNAL PROCESSO R GENERAL DESCRIPTION The samsung anal og front end(AFE) for CCD/CIS image sig nal is an integrated analog signal proc essor for color image signal. The AFE c onverts CCD/CIS output signal to digita l data. The AFE includes three-channel CDS(Correlated Double Sampling) circuit , PGA(Programmable Gain Amplifier), and 12-bit analog to .
Manufacture

Samsung

Datasheet
Download BL8531H Datasheet




 BL8531H
BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
GENERAL DESCRIPTION
The samsung analog front end(AFE) for CCD/CIS image signal is an integrated analog signal processor for color
image signal.
The AFE converts CCD/CIS output signal to digital data. The AFE includes three-channel CDS(Correlated
Double Sampling) circuit, PGA(Programmable Gain Amplifier), and 12-bit analog to digital converter with
reference generator.
A parallel data bus provides a simple interface to 8-bit microcontroller.
APPLICATIONS
Color and B/W Scanner
Digital Copiers
Facsimile
General Purpose CCD/CIS imager
FETURES
12-bit 6MSPS A/D Converter
Integrated Triple Correlated Double Sampler
3-Channel 2 MSPS Color Mode
Analog Programmble Gain Amplifier
Internal Voltage Reference
Wide clamp level controllability for CIS sensor
No Missing Code Guaranteed
Microcontroller-Compatible Control Interface
Operation by Single 5V Supply
CMOS Low Power Dissipation
KEY SPECIFICATION
Resolution: 12-bit
Conversion Rate: 6 MHz(2 MHz*3)
Supply Voltage: 5 V ± 5%
Power Dissipation: 375 mW(Typical)
1




 BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
FUNCTIONAL BLOCK DIAGRAM
BL8531H
RED
CDS
GREEN
INPUT OFFSET
REGISTER
CDS
BLUE
CDS
PGA
PGA MUX
REF
D[11:0]
ADC
MPU
PORT
PGA
GAIN
REGISTER
Ver 2.0 (Apr. 2002)
No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties
that may result from its use. The content of this datasheet is subject to change without any notice.
2




 BL8531H
BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
CORE PIN DESCRIPTION
Name
VDDA1
VSSA1
VDDA2
VSSA2
VBB
VDDD
VSSD
REFT
REFB
VCOM
BGR
R_VIN
G_VIN
B_VIN
STRTLN
CDS1_CLK
CDS2_CLK
ADCCLK
CSB
WRB
RDB
OEB
D[11:0]/MPU[7:0]
AD[2:0]
MCTL1, MCTL2
EXT_MCTL
I/O Type
AP
AG
AP
AG
AG
DP
DG
AB
AB
AB
AB
AI
AI
AI
DI
DI
DI
DI
DI
DI
DI
DI
DB
DI
DI
DI
I/O Pad
vdda
vssa
vdda
vssa
vbba
vddd
vssd
piar50_bb
piar50_bb
piar50_bb
piar50_bb
piar10_bb
piar10_bb
piar10_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
pia_bb
picc_bb
picc_bb
picc_bb
Pin Description
5 V Analog Supply
Analog Ground
5 V Analog Supply(for ADC)
Analog Ground(for ADC)
Substarte Ground
5 V Digital Supply
Digital Ground
Reference Decoupling
Reference Decoupling
Analog Common Voltage
Bandgap Refernce Voltage
Analog Input; Red
Analog Input; Green
Analog Input; Blue
STRTLN indicates beginning of line
CDS Reset Clock Pulse Input
CDS Data Clock Pulse Input
A/D Converter Sample Clock Input
Chip Select; Active Low
Write Strobe; Active Low
Read Strobe; Active Low
Output Enable; Active Low
Data Inputs/Outputs
Register Select
Channel Select in External MUX Control
External MUX Control; Active Low
I/O TYPE ABBR.
AI : Analog Input
DI : Digital Input
AO : Analog Output
DO : Analog Output
AP : Analog Power
AG : Analog Ground
DP : Digital Power
DG : Digital Ground
AB : Analog Bidirectional Port DB : Digital Bidirectional Port
3




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