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Bit Processor. 80546KF Datasheet

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Bit Processor. 80546KF Datasheet
















80546KF Processor. Datasheet pdf. Equivalent













Part

80546KF

Description

64 Bit Processor



Feature


64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet March 20 05 Document Number: 306754-001 INFORM ATION IN THIS DOCUMENT IS PROVIDED IN C ONNECTION WITH INTEL® PRODUCTS. NO LIC ENSE, EXPRESS OR IMPLIED, BY ESTOPPEL O R OTHERWISE, TO ANY INTELLECTUAL PROPER TY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FO.
Manufacture

Intel

Datasheet
Download 80546KF Datasheet


Intel 80546KF

80546KF; R SUCH PRODUCTS, INTEL ASSUMES NO LIABIL ITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS IN CLUDING LIABILITY OR WARRANTIES RELATIN G TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUA L PROPERTY RIGHT. Intel products are no t intended for use.


Intel 80546KF

in medical, life saving, or life sustai ning applications. Intel may make chang es to specifications and product descri ptions at any time, without notice. Des igners must not rely on the absence or characteristics of any features or inst ructions marked “reserved” or “un defined.” Intel reserves these for fu ture definition and shall have no respo nsibility whatsoever for c.


Intel 80546KF

onflicts or incompatibilities arising fr om future changes to them. The 64-Bit I ntel® Xeon™ processor MP with up to 8MB L3 cache may contain design defects or errors known as errata which may ca use the product to deviate from publish ed specifications. Current characterize d errata are available on request. Cont act your local Intel sales office or yo ur distributor to obt.





Part

80546KF

Description

64 Bit Processor



Feature


64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet March 20 05 Document Number: 306754-001 INFORM ATION IN THIS DOCUMENT IS PROVIDED IN C ONNECTION WITH INTEL® PRODUCTS. NO LIC ENSE, EXPRESS OR IMPLIED, BY ESTOPPEL O R OTHERWISE, TO ANY INTELLECTUAL PROPER TY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FO.
Manufacture

Intel

Datasheet
Download 80546KF Datasheet




 80546KF
64-bit Intel® Xeon™ Processor
MP with up to 8MB L3 Cache
Datasheet
March 2005
Document Number: 306754-001




 80546KF
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 64-Bit Intel® Xeon™ processor MP with up to 8MB L3 cache may contain design defects or errors known as errata which may cause the product
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel.
Implementations of the I2C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips
Corporation.
Intel, Pentium, Intel Xeon, Intel NetBurst, Intel SpeedStep and the Intel logo are trademarks or registered trademarks of Intel Corporation or its
subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2005, Intel Corporation.
2 64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet




 80546KF
Contents
1 Introduction....................................................................................................................... 11
1.1 Terminology......................................................................................................... 12
1.2 References .......................................................................................................... 14
1.3 State of Data ....................................................................................................... 15
2 Electrical Specifications.................................................................................................... 17
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
Front Side Bus and GTLREF .............................................................................. 17
2.1.1 Front Side Bus Clock and Processor Clocking....................................... 18
2.1.2 Front Side Bus Clock Select (BSEL[1:0]) ............................................... 19
2.1.3 Phase Lock Loop (PLL) Power and Filter............................................... 19
Voltage Identification (VID).................................................................................. 20
Cache Voltage Identification (CVID).................................................................... 23
Reserved, Unused, and TESTHI Pins.................................................................24
Mixing Processors ............................................................................................... 24
Front Side Bus Signal Groups............................................................................. 25
GTL+ Asynchronous and AGTL+ Asynchronous Signals ................................... 27
Test Access Port (TAP) Connection.................................................................... 27
Maximum Ratings................................................................................................ 27
Processor DC Specifications............................................................................... 28
2.10.1 Flexible Motherboard (FMB) Guidelines................................................. 28
2.10.2 VCC and VCACHE Overshoot Specification.......................................... 32
2.10.3 Die Voltage Validation ............................................................................ 33
AGTL+ Front Side Bus Specifications .................................................................37
Front Side Bus AC Specifications ....................................................................... 37
Processor AC Timing Waveforms ....................................................................... 42
3 Front Side Bus Signal Quality Specifications ................................................................... 53
3.1 Front Side Bus Signal Quality Specifications and Measurement Guidelines ...... 53
3.1.1 Ringback Guidelines .............................................................................. 53
3.1.2 Overshoot/Undershoot Guidelines ......................................................... 56
3.1.3 Overshoot/Undershoot Magnitude ......................................................... 56
3.1.4 Overshoot/Undershoot Pulse Duration................................................... 57
3.1.5 Activity Factor......................................................................................... 57
3.1.6 Reading Overshoot/Undershoot Specification Tables............................ 57
3.1.7 Determining if a System Meets Over/Undershoot Specifications........... 58
4 Mechanical Specifications ................................................................................................ 61
4.1 Package Mechanical Drawing ............................................................................. 62
4.2 Processor Component Keep-Out Zones ............................................................. 65
4.3 Package Loading Specifications ......................................................................... 65
4.4 Package Handling Guidelines ............................................................................. 66
4.5 Package Insertion Specifications ........................................................................ 66
4.6 Processor Mass Specifications ........................................................................... 66
4.7 Processor Materials............................................................................................. 66
4.8 Processor Markings............................................................................................. 67
4.9 Processor Pin-Out Coordinates........................................................................... 68
64-bit Intel® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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