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OR Gate. 54HC32 Datasheet

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OR Gate. 54HC32 Datasheet






54HC32 Gate. Datasheet pdf. Equivalent




54HC32 Gate. Datasheet pdf. Equivalent





Part

54HC32

Description

Quad 2-Input OR Gate



Feature


MOTOROLA SEMICONDUCTOR TECHNICAL DATA Q uad 2-Input OR Gate High–Performance Silicon–Gate CMOS The MC54/74HC32A is identical in pinout to the LS32. The d evice inputs are compatible with Standa rd CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs . • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface t o CMOS, NMOS and TTL • Ope.
Manufacture

Motorola Semiconductor

Datasheet
Download 54HC32 Datasheet


Motorola Semiconductor 54HC32

54HC32; rating Voltage Range: 2 to 6V • Low In put Current: 1µA • High Noise Immuni ty Characteristic of CMOS Devices • I n Compliance With the JEDEC Standard No . 7A Requirements • Chip Complexity: 48 FETs or 12 Equivalent Gates LOGIC D IAGRAM 1 A1 2 B1 4 A2 5 B2 9 A3 10 B3 12 A4 13 B4 PIN 14 = VCC PIN 7 = GND 3 Y1 6 Y2 Y = A+B 8 Y3 11 Y4 Pinout: 1 4–Lead Packages (Top View) .


Motorola Semiconductor 54HC32

VCC B4 A4 Y4 B3 A3 Y3 14 13 12 11 10 9 8 MC54/74HC32A 14 1 14 1 14 1 J SUFFI X CERAMIC PACKAGE CASE 632–08 N SUFFI X PLASTIC PACKAGE CASE 646–06 D SUFFI X SOIC PACKAGE CASE 751A–03 14 1 DT SUFFIX TSSOP PACKAGE CASE 948B–03 O RDERING INFORMATION MC54HCXXAJ MC74HCX XAN MC74HCXXAD MC74HCXXADT Ceramic Pla stic SOIC TSSOP FUNCTION TABLE Inputs Output AB Y LL LH HL .


Motorola Semiconductor 54HC32

HH L H H H 1234567 A1 B1 Y1 A2 B2 Y2 G ND 10/95 © Motorola, Inc. 1995 3–1 REV 6 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎMC54/74HC32A ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎMAXIMUM RATINGS* ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol P arameter Value Unit ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIin ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ.

Part

54HC32

Description

Quad 2-Input OR Gate



Feature


MOTOROLA SEMICONDUCTOR TECHNICAL DATA Q uad 2-Input OR Gate High–Performance Silicon–Gate CMOS The MC54/74HC32A is identical in pinout to the LS32. The d evice inputs are compatible with Standa rd CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs . • Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface t o CMOS, NMOS and TTL • Ope.
Manufacture

Motorola Semiconductor

Datasheet
Download 54HC32 Datasheet




 54HC32
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input OR Gate
High–Performance Silicon–Gate CMOS
The MC54/74HC32A is identical in pinout to the LS32. The device
inputs are compatible with Standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2 to 6V
Low Input Current: 1µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 48 FETs or 12 Equivalent Gates
LOGIC DIAGRAM
1
A1
2
B1
4
A2
5
B2
9
A3
10
B3
12
A4
13
B4
PIN 14 = VCC
PIN 7 = GND
3
Y1
6
Y2
Y = A+B
8
Y3
11
Y4
Pinout: 14–Lead Packages (Top View)
VCC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
MC54/74HC32A
14
1
14
1
14
1
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
D SUFFIX
SOIC PACKAGE
CASE 751A–03
14
1
DT SUFFIX
TSSOP PACKAGE
CASE 948B–03
ORDERING INFORMATION
MC54HCXXAJ
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Ceramic
Plastic
SOIC
TSSOP
FUNCTION TABLE
Inputs
Output
AB
Y
LL
LH
HL
HH
L
H
H
H
1234567
A1 B1 Y1 A2 B2 Y2 GND
10/95
© Motorola, Inc. 1995
3–1
REV 6




 54HC32
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMC54/74HC32A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎIout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎICC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
– 0.5 to VCC + 0.5
– 0.5 to VCC + 0.5
± 20
V
V
mA
DC Output Current, per Pin
± 25 mA
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic or Ceramic DIP†
SOIC Package†
TSSOP Package†
± 50
750
500
450
mA
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature, 1 mm from Case for 10 Seconds
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPlastic DIP, SOIC or TSSOP Package
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCeramic DIP
– 65 to + 150
260
300
_C
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ* Maximum Ratings are those values beyond which damage to the device may occur.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
v vVout should be constrained to the
range GND (Vin or Vout) VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎFor high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎRECOMMENDED OPERATING CONDITIONS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Min Max Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtr, tf
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time
(Figure 1)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
2.0
0
– 55
0
0
0
6.0
VCC
+ 125
1000
500
400
V
V
_C
ns
MOTOROLA
3–2 High–Speed CMOS Logic Data
DL129 — Rev 6




 54HC32
MC54/74HC32A
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Condition
VCC
Guaranteed Limit
V –55 to 25°C 85°C 125°C Unit
VIH Minimum High–Level Input Voltage Vout = 0.1V or VCC –0.1V
|Iout| 20µA
2.0
1.50
1.50 1.50
V
3.0 2.10 2.10 2.10
4.5 3.15 3.15 3.15
6.0 4.20 4.20 4.20
VIL Maximum Low–Level Input Voltage Vout = 0.1V or VCC – 0.1V
|Iout| 20µA
2.0
0.50
0.50 0.50
V
3.0 0.90 0.90 0.90
4.5 1.35 1.35 1.35
6.0 1.80 1.80 1.80
VOH
Minimum High–Level Output
Voltage
Vin = VIH or VIL
|Iout| 20µA
2.0 1.9
4.5 4.4
6.0 5.9
1.9 1.9 V
4.4 4.4
5.9 5.9
VOL
Maximum Low–Level Output
Voltage
Vin =VIH or VIL |Iout| 2.4mA 3.0 2.48 2.34 2.20
|Iout| 4.0mA 4.5 3.98 3.84 3.70
|Iout| 5.2mA 6.0 5.48 5.34 5.20
Vin = VIH or VIL
|Iout| 20µA
2.0 0.1
4.5 0.1
6.0 0.1
0.1 0.1 V
0.1 0.1
0.1 0.1
Vin = VIH or VIL |Iout| 2.4mA 3.0 0.26 0.33 0.40
|Iout| 4.0mA 4.5 0.26 0.33 0.40
|Iout| 5.2mA 6.0 0.26 0.33 0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0 ±0.1 ±1.0 ±1.0
ICC Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0µA
6.0 1.0
10 40
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
µA
µA
AC CHARACTERISTICS (CL = 50pF, Input tr = tf = 6ns)
Symbol
Parameter
VCC
Guaranteed Limit
V –55 to 25°C 85°C
125°C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0 75
3.0 30
4.5 15
6.0 13
95 110 ns
40 55
19 22
16 19
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0 75
3.0 27
4.5 15
6.0 13
95 110 ns
32 36
19 22
16 19
Cin Maximum Input Capacitance
10 10 10 pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V, VEE = 0 V
CPD
Power Dissipation Capacitance (Per Buffer)*
20 pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
High–Speed CMOS Logic Data
DL129 — Rev 6
3–3
MOTOROLA



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