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MBM29LV160BE. 29LV160BE Datasheet

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MBM29LV160BE. 29LV160BE Datasheet






29LV160BE MBM29LV160BE. Datasheet pdf. Equivalent




29LV160BE MBM29LV160BE. Datasheet pdf. Equivalent





Part

29LV160BE

Description

MBM29LV160BE



Feature


FUJITSU SEMICONDUCTOR DATA SHEET DS05-2 0883-2E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT www.DataSheet4U.com MB M29LV160TE/BE -70/90/12 s GENERAL DESCR IPTION The MBM29LV160TE/BE is a 16M-bit , 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29LV160TE/BE is of fered in a 48-pin TSOP (I), 48-pin CSOP and 48-ball FBGA pa.
Manufacture

Fujitsu Media Devices

Datasheet
Download 29LV160BE Datasheet


Fujitsu Media Devices 29LV160BE

29LV160BE; ckages. The device is designed to be pro grammed in-system with the standard sys tem 3.0 V VCC supply. 12.0 V VPP and 5. 0 V VCC are not required for write or e rase operations. The device can also be reprogrammed in standard EPROM program mers. The standard MBM29LV160TE/BE offe rs access times of 70 ns, 90 ns and 120 ns, allowing operation of highspeed mi croprocessors with.


Fujitsu Media Devices 29LV160BE

out wait states. To eliminate bus conten tion the device has separate chip enabl e (CE), write enable (WE), and output e nable (OE) controls. The MBM29LV160TE/B E is pin and command set compatible wit h JEDEC standard E2PROMs. Commands are written to the command register using s tandard microprocessor write timings. R egister contents serve as input to an i nternal state-mach.


Fujitsu Media Devices 29LV160BE

ine which controls the erase and program ming circuitry. Write cycles also inter nally latch addresses and data needed f or the programming and erase operations . Reading data out of the device is sim ilar to reading from 5.0 V and 12.0 V F lash or EPROM devices. The MBM29LV160TE /BE is programmed by executing the prog ram command sequence. This will invoke the Embedded Progr.

Part

29LV160BE

Description

MBM29LV160BE



Feature


FUJITSU SEMICONDUCTOR DATA SHEET DS05-2 0883-2E FLASH MEMORY CMOS 16M (2M × 8/1M × 16) BIT www.DataSheet4U.com MB M29LV160TE/BE -70/90/12 s GENERAL DESCR IPTION The MBM29LV160TE/BE is a 16M-bit , 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words of 16 bits each. The MBM29LV160TE/BE is of fered in a 48-pin TSOP (I), 48-pin CSOP and 48-ball FBGA pa.
Manufacture

Fujitsu Media Devices

Datasheet
Download 29LV160BE Datasheet




 29LV160BE
FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-20883-2E
FLASH MEMORY
CMOS
16M (2M × 8/1M × 16) BIT
MBM29LV160TE/BE -www.DataSheet4U.com
70/90/12
s GENERAL DESCRIPTION
The MBM29LV160TE/BE is a 16M-bit, 3.0 V-only Flash memory organized as 2M bytes of 8 bits each or 1M words
of 16 bits each. The MBM29LV160TE/BE is offered in a 48-pin TSOP (I), 48-pin CSOP and 48-ball FBGA
packages. The device is designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0
V VPP and 5.0 V VCC are not required for write or erase operations. The device can also be reprogrammed in
standard EPROM programmers.
The standard MBM29LV160TE/BE offers access times of 70 ns, 90 ns and 120 ns, allowing operation of high-
speed microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE),
write enable (WE), and output enable (OE) controls.
The MBM29LV160TE/BE is pin and command set compatible with JEDEC standard E2PROMs. Commands are
written to the command register using standard microprocessor write timings. Register contents serve as input
to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch
addresses and data needed for the programming and erase operations. Reading data out of the device is similar
to reading from 5.0 V and 12.0 V Flash or EPROM devices.
The MBM29LV160TE/BE is programmed by executing the program command sequence. This will invoke the
Embedded ProgramTM* Algorithm which is an internal algorithm that automatically times the program pulse widths
and verifies proper cell margins. Typically, each sector can be programmed and verified in about 0.5 seconds.
Erase is accomplished by executing the erase command sequence. This will invoke the Embedded EraseTM*
Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed
before executing the erase operation. During erase, the device automatically times the erase pulse widths and
verifies proper cell margins.
Any individual sector is typically erased and verified in 1.0 second. (If already preprogrammed.)
within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word
at a time using the EPROM programming mechanism of hot electron injection.
s PRODUCT LINE UP
(Continued)
Part No.
Ordering Part No.
VCC
=
3.3
V
+0.3 V
–0.3 V
VCC
=
3.0
V
+0.6 V
–0.3 V
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
MBM29LV160TE/160BE
70 —
— 90 12
70 90 120
70 90 120
30 35 50




 29LV160BE
MBM29LV160TE/BE-70/90/12
(Continued)
The device also features a sector erase architecture. The sector mode allows each sector to be erased and
reprogrammed without affecting other sectors. The MBM29LV160TE/BE is erased when shipped from the factory.
The device features single 3.0 V power supply operation for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations. A low VCC detector automatically
inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ7,
by the Toggle Bit feature on DQ6, or the RY/BY output pin. Once the end of a program or erase cycle has been
comleted, the device internally resets to the read mode.
The MBM29LV160TE/BE also has a hardware RESET pin. When this pin is driven low, execution of any Em-
bedded Program Algorithm or Embedded Erase Algorithm is terminated. The internal state machine is then
reset to the read mode. The RESET pin may be tied to the system reset circuitry. Therefore, if a system reset
www.DataSheet4U.coocmcurs during the Embedded Program Algorithm or Embedded Erase Algorithm, the device is automatically
reset to the read mode and will have erroneous data stored in the address locations being programmed or
erased. These locations need re-writing after the Reset. Resetting the device enables the system’s micropro-
cessor to read the boot-up firmware from the Flash memory.
Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest
levels of quality, reliability, and cost effectiveness. The MBM29LV160TE/BE memory electrically erases all bits
within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word
at a time using the EPROM programming mechanism of hot electron injection.
* : Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
s PACKAGES
48-pin plastic TSOP (I)
Marking Side
48-pin plastic TSOP (I)
(FPT-48P-M19)
48-pin plastic CSOP
Marking Side
(FPT-48P-M20)
48-pin plastic FBGA
(LCC-48P-M03)
2
(BGA-48P-M11)




 29LV160BE
MBM29LV160TE/BE-70/90/12
s FEATURES
• 0.23 µm Process Technology
• Single 3.0 V read, program and erase
Minimizes system level power requirements
• Compatible with JEDEC-standard commands
Uses same software commands as E2PROMs
• Compatible with JEDEC-standard world-wide pinouts
48-pin TSOP (I) (Package suffix: TN-Normal Bend Type, TR-Reversed Bend Type)
48-pin CSOP (Package suffix: PCV)
48-ball FBGA (Package suffix: PBT)
www.DataSheet4U.comMinimum 100,000 program/erase cycles
• High performance
70 ns maximum access time
• Sector erase architecture
One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode
One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
• Boot Code Sector Architecture
T = Top sector
B = Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically programs and verifies data at specified address
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic sleep mode
When addresses remain stable, automatically switches themselves to low power mode
• Low VCC write inhibit 2.5 V
• Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Sector protection
Hardware method disables any combination of sectors from program or erase operations
• Sector Protection Set function by Extended sector Protection command
• Fast Programming Function by Extended command
• Temporary sector unprotection
Temporary sector unprotection via the RESET pin
• In accordance with CFI (Common Flash Memory Interface)
3



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