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P89C669. 89C669 Datasheet

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P89C669. 89C669 Datasheet
















89C669 P89C669. Datasheet pdf. Equivalent













Part

89C669

Description

P89C669



Feature


P89C669 80C51 8-bit microcontroller fam ily with extended memory; 96 kB Flash w ith 2 kB RAM Rev. 02 — 13 November 2 003 Product data 1. General descripti on The P89C669 represents the first Fl ash microcontroller based on Philips Se miconductors’ new 51MX core. The P89C 669 features 96 kbytes of Flash program memory and 2 kbytes of data SRAM. In a ddition, this device is .
Manufacture

NXP

Datasheet
Download 89C669 Datasheet


NXP 89C669

89C669; equipped with a Programmable Counter Arr ay (PCA), a watchdog timer that can be configured to different time ranges th rough SFR bits, as well as two enhanced UARTs and byte based I2C-bus serial in terface. Philips Semiconductors’ 51MX (Memory eXtension) core is an accelera ted 80C51 architecture that executes in structions at twice the rate of standar d 80C51 devices. The l.


NXP 89C669

inear address range of the 51MX has been expanded to support up to 8 Mbytes of program memory and 8 Mbytes of data mem ory. It retains full program code compa tibility to enable design engineers to re-use 80C51 development tools, elimina ting the need to move to a new, unfamil iar architecture. The 51MX core also re tains 80C51 bus compatibility to allow for the continued .


NXP 89C669

use of 80C51-interfaced peripherals and Application Specific Integrated Circui ts (ASICs). The P89C669 provides greate r functionality, increased performance and overall lower system cost. By offer ing an embedded memory solution combine d with the enhancements to manage the m emory extension, the P89C669 eliminates the need for software work-arounds. Th e increased program .





Part

89C669

Description

P89C669



Feature


P89C669 80C51 8-bit microcontroller fam ily with extended memory; 96 kB Flash w ith 2 kB RAM Rev. 02 — 13 November 2 003 Product data 1. General descripti on The P89C669 represents the first Fl ash microcontroller based on Philips Se miconductors’ new 51MX core. The P89C 669 features 96 kbytes of Flash program memory and 2 kbytes of data SRAM. In a ddition, this device is .
Manufacture

NXP

Datasheet
Download 89C669 Datasheet




 89C669
P89C669
80C51 8-bit microcontroller family with extended memory;
96 kB Flash with 2 kB RAM
Rev. 02 — 13 November 2003
Product data
1. General description
The P89C669 represents the first Flash microcontroller based on Philips
Semiconductors’ new 51MX core. The P89C669 features 96 kbytes of Flash program
memory and 2 kbytes of data SRAM. In addition, this device is equipped with a
Programmable Counter Array (PCA), a watchdog timer that can be configured to
different time ranges through SFR bits, as well as two enhanced UARTs and byte
based I2C-bus serial interface.
Philips Semiconductors’ 51MX (Memory eXtension) core is an accelerated 80C51
architecture that executes instructions at twice the rate of standard 80C51 devices.
The linear address range of the 51MX has been expanded to support up to 8 Mbytes
of program memory and 8 Mbytes of data memory. It retains full program code
compatibility to enable design engineers to re-use 80C51 development tools,
eliminating the need to move to a new, unfamiliar architecture. The 51MX core also
retains 80C51 bus compatibility to allow for the continued use of 80C51-interfaced
peripherals and Application Specific Integrated Circuits (ASICs).
The P89C669 provides greater functionality, increased performance and overall lower
system cost. By offering an embedded memory solution combined with the
enhancements to manage the memory extension, the P89C669 eliminates the need
for software work-arounds. The increased program memory enables design
engineers to develop more complex programs in a high-level language like C, for
example, without struggling to contain the program within the traditional 64 kbytes of
program memory. These enhancements also greatly improve C Language efficiency
for code size below 64 kbytes.
The P89C669 device contains a non-volatile Flash program memory that is both
parallel programmable and serial In-System and In-Application Programmable.
In-System Programming (ISP) allows the user to download new code while the
microcontroller sits in the application. In-Application Programming (IAP) means that
the microcontroller fetches new program code and reprograms itself while in the
system. This allows for remote programming over a modem link. A default serial
loader (boot loader) program in ROM allows serial In-System programming of the
Flash memory via the UART without the need for a loader in the Flash code. For
In-Application Programming, the user program erases and reprograms the Flash
memory by use of standard routines contained in ROM.
The 51MX core is described in more detail in the 51MX Architecture Reference.




 89C669
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
2. Features
9397 750 12299
Product data
2.1 Key features
s Extended features of the 51MX Core:
x 23-bit program memory space and 23-bit data memory space
x Linear program and data address range expanded to support up to 8 Mbytes
each
x Program counter expanded to 23 bits
x Stack pointer extended to 16 bits enabling stack space beyond the 80C51
limitation
x New 23-bit extended data pointer and two 24-bit universal pointers greatly
improve C compiler code efficiency in using pointers to access variables in
different spaces
s 100% binary compatibility with the classic 80C51 so that existing code is
completely reusable
s Up to 24 MHz CPU clock with 6 clock cycles per machine cycle
s 96 kbytes of on-chip program Flash
s 2 kbytes of on-chip data RAM
s Programmable Counter Array (PCA)
s Two full-duplex enhanced UARTs
s Byte based Fast I2C serial interface (400 kbits/s)
2.2 Key benefits
s Increases program/data address range to 8 Mbytes each
s Enhances performance and efficiency for C programs
s Fully 80C51-compatible microcontroller
s Provides seamless and compelling upgrade path from classic 80C51
s Preserves 80C51 code base, investment/knowledge, and peripherals and ASICs
s Supported by wide range of 80C51 development systems and programming tools
vendors
s The P89C669 makes it possible to develop applications at lower cost and with a
reduced time-to-market
2.3 Complete features
s Fully static
s Up to 24 MHz CPU clock with 6 clock cycles per machine cycle
s 96 kbytes of on-chip Flash with In-System Programming (ISP) and In-Application
Programming (IAP) capability
s 2 kbytes of on-chip RAM
s 23-bit program memory space and 23-bit data memory space
s Four-level interrupt priority
s 32 I/O lines (4 ports)
s Three Timers: Timer0, Timer1 and Timer2
s Two full-duplex enhanced UARTs with baud rate generator
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
2 of 33




 89C669
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
s Byte based Fast I2C-bus serial interface (400 kbits/s)
s Framing error detection
s Automatic address recognition
s Power control modes
s Clock can be stopped and resumed
s Idle mode
s Power-down mode
s Second DPTR register
s Asynchronous port reset
s Programmable Counter Array (PCA) (compatible with 8xC51Rx+) with five
Capture/Compare modules
s Low EMI (inhibit ALE)
s Watchdog timer with programmable prescaler for different time ranges
(compatible with 8xC66x with added prescaler)
3. Ordering information
Table 1: Ordering information
Type number Package
Name
Description
P89C669FA
PLCC44 plastic leaded chip carrier; 44 leads
P89C669BBD LQFP44 plastic low profile quad flat package; 44 leads;
body 10 × 10 × 1.4 mm
Version
SOT187-2
SOT389-1
3.1 Ordering options
Table 2: Ordering options
Type number Memory
OTP RAM
P89C669FA 96 kB 2048 B
P89C669BBD 96 kB 2048 B
Temperature range
40 °C to +85 °C
0 °C to +70 °C
VDD voltage
range
4.5 to 5.5 V
4.5 to 5.5 V
Frequency
0 to 24 MHz
0 to 24 MHz
9397 750 12299
Product data
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
3 of 33




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