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Secure Microcontroller. AT90SC12872RCFT Datasheet

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Secure Microcontroller. AT90SC12872RCFT Datasheet






AT90SC12872RCFT Microcontroller. Datasheet pdf. Equivalent




AT90SC12872RCFT Microcontroller. Datasheet pdf. Equivalent





Part

AT90SC12872RCFT

Description

Secure Microcontroller



Feature


www.DataSheet4U.com Features General High-performance, Low-power secureAVR  Core Enhanced RISC Architecture • • • • • • • – 137 Powerf ul Instructions (Most Executed in a Sin gle Clock Cycle) Bond Pad Locations Con forming to ISO 7816-2 ESD Protection to ± 6000V Operating Ranges: from 2.7V t o 5.5V Compliant with ICAO specificatio ns; EMV 2000 Specifications; PC Industr.
Manufacture

ATMEL Corporation

Datasheet
Download AT90SC12872RCFT Datasheet


ATMEL Corporation AT90SC12872RCFT

AT90SC12872RCFT; y Compatible Power-saving Wait and Very Low-power Stop Modes Power-up Detection Available in Wafers, Modules, Dual Int erface Module, Contactless Module or In lay and Industry-standard Packages Con tactless Mode • Contactless Interface Controller (CIC) with Full Support for ISO/IEC 14443 Type A and • • • • • • • B Protocols Supply V oltage Clamp and Regulation Full-bri.


ATMEL Corporation AT90SC12872RCFT

dge Power Rectification On-chip Tuning C apacitance: 10 pF up to 120 pF 3.4 MHz Internal Bus Maximum Frequency with a C lock Extracted From the External Clock and 20 (AVR®) or 40 MHz (AdvX) if t he Clock is Internally Generated 13.56 MHz Clock Extraction 3.4 MHz Internal B us Frequency Reader-to-card: – ISO/IE C Type A: 100% ASK Modulation and Modif ied Miller Bit Coding –.


ATMEL Corporation AT90SC12872RCFT

ISO/IEC Type B: 10% ASK Modulation and NRZ Bit Coding Card-to-reader: – ISO/ IEC Type A: Generation of 847.5Khz Subc arrier with OOK Modulation and Manchest er Bit Coding – ISO/IEC Type B: Modul ation of Incoming RF Carrier by Resisti ve Load Switching / Generation of 847.5 Khz Subcarrier with BPSK Modulation / N RZ Data Encoding Baud Rates: Up to 424 kbps RF Frame: Up to 2.

Part

AT90SC12872RCFT

Description

Secure Microcontroller



Feature


www.DataSheet4U.com Features General High-performance, Low-power secureAVR  Core Enhanced RISC Architecture • • • • • • • – 137 Powerf ul Instructions (Most Executed in a Sin gle Clock Cycle) Bond Pad Locations Con forming to ISO 7816-2 ESD Protection to ± 6000V Operating Ranges: from 2.7V t o 5.5V Compliant with ICAO specificatio ns; EMV 2000 Specifications; PC Industr.
Manufacture

ATMEL Corporation

Datasheet
Download AT90SC12872RCFT Datasheet




 AT90SC12872RCFT
www.DataSheet4U.com
Features
General
High-performance, Low-power secureAVRCore Enhanced RISC Architecture
– 137 Powerful Instructions (Most Executed in a Single Clock Cycle)
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 6000V
Operating Ranges: from 2.7V to 5.5V
Compliant with ICAO specifications; EMV 2000 Specifications; PC Industry Compatible
Power-saving Wait and Very Low-power Stop Modes
Power-up Detection
Available in Wafers, Modules, Dual Interface Module, Contactless Module or Inlay and
Industry-standard Packages
Contactless Mode
Contactless Interface Controller (CIC) with Full Support for ISO/IEC 14443 Type A and
B Protocols
Supply Voltage Clamp and Regulation
Full-bridge Power Rectification
On-chip Tuning Capacitance: 10 pF up to 120 pF
3.4 MHz Internal Bus Maximum Frequency with a Clock Extracted From the External
Clock and 20 (AVR®) or 40 MHz (AdvX) if the Clock is Internally Generated
13.56 MHz Clock Extraction
3.4 MHz Internal Bus Frequency
Reader-to-card:
– ISO/IEC Type A: 100% ASK Modulation and Modified Miller Bit Coding
– ISO/IEC Type B: 10% ASK Modulation and NRZ Bit Coding
Card-to-reader:
– ISO/IEC Type A: Generation of 847.5Khz Subcarrier with OOK Modulation and
Manchester Bit Coding
– ISO/IEC Type B: Modulation of Incoming RF Carrier by Resistive Load Switching /
Generation of 847.5Khz Subcarrier with BPSK Modulation / NRZ Data Encoding
Baud Rates: Up to 424 kbps
RF Frame: Up to 256 Bytes
Memory
128K Bytes of ROM Program Memory
72K Bytes of EEPROM, Including 128 OTP Bytes and 384-byte Bit-addressable Area
– 1 to 128-byte Program / Erase
– 2 ms Program / 2 ms Erase
– Typically More than 500,000 Write/Erase Cycles at Temperatures of 250C
– Minimum 10 Years Data Retention
5K Bytes of RAM + 256 Bytes of DMA Dedicated RAM
32K Bytes of ROM Dedicated to Atmel’s Crypto Library
Peripherals
One ISO 7816 Controller
– Up to 625 kbps at 5 MHz
– Compliant with T= 0 and T= 1 Protocols
Two I/O Ports (Configurable to Support ISO7816-3, 2-wire protocols...)
Programmable Internal Oscillator (Up to 40 Mhz for AdvX and Up to 20 Mhz for Internal
CPU clock)
Three16-bit Timers (Watchdog capability)
Random Number Generator (RNG)
2-level, 8-vector Interrupt Controller
Hardware DES and Triple DES (DPA, SPA, DEMA Resistant)
Secure
Microcontroller
for Smart Cards
AT90SC
12872RCFT
Summary
6502AS–SMIC–05Apr05
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.




 AT90SC12872RCFT
www.DataSheet4U.com
Checksum Accelerator
CRC 16 & 32 Engine (Compliant with ISO/IEC 3309)
32-Bit AdvX Cryptographic Accelerator for Public Key Operations
– RSA, DSA, ECC, Diffie-Hellman
DMA Controller (Used to Speed-Up Data Transfers when Communicating via the Contactless Interface)
Security
Dedicated Hardware for Protection Against SPA/DPA/DEMA Attacks
Advanced Protection Against Physical Attack, Including Active Shield
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Temperature Monitor
Light Protection
Secure Memory Management/Access Protection (Supervisor Mode)
Designed to meet Common Criteria EAL4+
Development Tools
Voyager Emulation Platform (ATV4 Advanced) to Support Software Development
IAR Embedded Workbench® V3.20c Debugger or Atmel’s AVR Studio® Version 4.07 or Above
Software Libraries and Application Notes
Description
The AT90SC12872RCFT is a low-power, high-performance, 8-/16-bit microcontroller with ROM program memory,
EEPROM data memor y, based on the secureAVR enhanced RISC architecture and with a dual interface
(contact+contactless).
By executing powerful instructions in a single clock cycle, the AT90SC12872RCFT achieves throughputs close to 1 MIPS
per MHz. Its Harvard architecture includes 32 general-purpose working registers directly connected to the ALU, allowing
two independent registers to be accessed in one single instruction executed in one clock cycle.
The AT90SC12872RCFT uses the secureAVR architecture that allows the linear addressing of up to 8M bytes of code and
up to 16M bytes of data as well as a number of new functional and security features.
The AT90SC12872RCFT features 72K bytes of high-performance EEPROM (fast erase/write time, high endurance).This
allows system developers to offer their customers a true 64K bytes EEPROM, while still being able to use the remaining 8K
bytes for their own purposes (customization and patches, for example). The ability to map the EEPROM in the code space
allows parts of the program memory to be reprogrammed in-system.
The cryptographic accelerator featured in the AT90SC12872RCFT is the new AdvX, a N-bit multiplier-accumulator
dedicated to performing fast encryption and authentication functions. All cryptographic routines are executed on the
secureAVR core which uses the AdvX accelerator during encryption/decryption. AdvX is based on a 32-bit technology, thus
enabling fast computation and low power operation. AdvX supports standard finite fields arithmetic functions (including
RSA, DSA, DH and ECC) and GF(2N) arithmetic functions (including ECC).
Additional security features include power, frequency and temperature protection logic, logical scrambling on program data
and addresses, power analysis countermeasures, and memory accesses controlled by a supervisor mode.
This product is specifically designed for Smart Cards and targets Access Control and ID applications.
A block diagram of the AT90SC12872RCF is shown in Figure 1.
2 AT90SC12872RCFT
6502AS–SMIC–05Apr05




 AT90SC12872RCFT
www.DataSheet4U.com
AT90SC12872RCFT
Figure 1. AT90SC12872RCFT Contact/Contactless secureAVR Enhanced Architecture
32K ROM
Cryptography
72KB EEPROM
User Memory
+ OTP
128KB
PC ROM Program
Memory
16
Instruction
Register
16
Instruction
Decoder
16
Control
Lines
Access
Control
Data Bus
8-bit
General
Purpose
Registers
X
Y
Z
8
8
ALU
8
Status
Register
Access
Control
RNG
5KB RAM
Data Memory
Interrupt
Unit
ISO 7816
Controller
ISO 7816
I/O Port 0
ISO 7816
I/O Port 1
Secure
Control
ISO14443
DMA
Controller (CIC) Controller
RF Modulator
Power and Clock
Timers
DES/Triple DES
Reset
Circuit
AdvX
Crypto-Accelerator
CLK
GND
VCC
IN/OUT0
IN/OUT1
RF1
RF2
RST
DPA Counter
Measures
CRC and
Checksum
Accelerator
6502AS–SMIC–05Apr05
3



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