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Signal Controller. 56F8135 Datasheet

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Signal Controller. 56F8135 Datasheet
















56F8135 Controller. Datasheet pdf. Equivalent













Part

56F8135

Description

16-bit Digital Signal Controller



Feature


56F8335/56F8135 Data Sheet Preliminary T echnical Data 56F8300 16-bit Digital Si gnal Controller MC56F8335 Rev. 5 01/200 7 freescale.com Version History Rev. 0 Rev. 1 Rev. 2 Rev. 3 Rev. 4 Rev. 5 Do cument Revision History Description of Change Initial Release Deleted RSTO fro m Pin Group 2 (listed after Table 10-1) . Deleted formula for Max Ambient Opera ting Temperature (.
Manufacture

Freescale Semiconductor

Datasheet
Download 56F8135 Datasheet


Freescale Semiconductor 56F8135

56F8135; Automotive) and Max Ambient Operating Te mperature (Industrial) in Table 10-4. A dded RoHS-compliance and “pb-free” language to back cover. Added informati on/corrected state during reset in Tabl e 2-2. Clarified external reference cry stal frequency for PLL in Table 10-14 b y increasing maximum value to 8.4MHz. R eplaced “Tri-stated” with an explan ation in State During Rese.


Freescale Semiconductor 56F8135

t column in Table 2-2. Revised Table 4-4 to include correct program Flash size. • Added the following note to the de scription of the TMS signal in Table 2- 2: Note: Always tie the TMS pin to VDD through a 2.2K resistor. • Added the following note to .


Freescale Semiconductor 56F8135

.





Part

56F8135

Description

16-bit Digital Signal Controller



Feature


56F8335/56F8135 Data Sheet Preliminary T echnical Data 56F8300 16-bit Digital Si gnal Controller MC56F8335 Rev. 5 01/200 7 freescale.com Version History Rev. 0 Rev. 1 Rev. 2 Rev. 3 Rev. 4 Rev. 5 Do cument Revision History Description of Change Initial Release Deleted RSTO fro m Pin Group 2 (listed after Table 10-1) . Deleted formula for Max Ambient Opera ting Temperature (.
Manufacture

Freescale Semiconductor

Datasheet
Download 56F8135 Datasheet




 56F8135
56F8335/56F8135
Data Sheet
Preliminary Technical Data
56F8300
16-bit Digital Signal Controller
MC56F8335
Rev. 5
01/2007
freescale.com




 56F8135
Version History
Rev. 0
Rev. 1
Rev. 2
Rev. 3
Rev. 4
Rev. 5
Document Revision History
Description of Change
Initial Release
Deleted RSTO from Pin Group 2 (listed after Table 10-1). Deleted formula for Max Ambient
Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in
Table 10-4. Added RoHS-compliance and “pb-free” language to back cover.
Added information/corrected state during reset in Table 2-2. Clarified external reference
crystal frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz.
Replaced “Tri-stated” with an explanation in State During Reset column in Table 2-2.
Revised Table 4-4 to include correct program Flash size.
• Added the following note to the description of the TMS signal in Table 2-2:
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
• Added the following note to the description of the TRST signal in Table 2-2:
Note: For normal operation, connect TRST directly to VSS. If the design is to be used in a
debugging environment, TRST may be tied to VSS through a 1K resistor.
Please see http://www.freescale.com for the most current data sheet revision.
56F8335 Technical Data, Rev. 5
2 Freescale Semiconductor
Preliminary




 56F8135
56F8335/56F8135 General Description
Note: Features in italics are NOT available in the 56F8135 device.
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• 64KB Program Flash
• 4KB Program RAM
• 8KB Data Flash
• 8KB Data RAM
• 8KB Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
Up to two Quadrature Decoders
FlexCAN module
• Optional On-Chip Regulator
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interface (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP)/Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 49 GPIO lines
• 128-pin LQFP Package
6 PWM Outputs
3 Current Sense Inputs
or GPIOC
4 Fault Inputs
PWMA
6 PWM Outputs
3 Current Sense Inputs
or GPIOD
4 Fault Inputs
PWMB
4 AD0
4
ADCA
AD1
Memory
5 VREF
Program Memory
4 AD0
32K x 16 Flash
ADCB
2K x 16 RAM
4 AD1
4K x 16 Boot
Flash
TEMP_SENSE
Quadrature Data Memory
4 Decoder 0 or 4K x 16 Flash
Quad
4K x 16 RAM
Timer A or
GPIOC
Quadrature
4 Decoder 1 or
Quad
Timer B or
SP1I or
GPIOC Decoding
2 Quad Timer Peripherals
C or GPIOE
4 Quad Timer
D or GPIOE
2 FlexCAN
SPI0 or
GPIOE
RSTO
RESET
5
VPP
2
OCR_DIS
VCAP VDD VSS VDDA
47
52
VSSA
JTAG/
EOnCE
Port
Digital Reg Analog Reg
16-Bit
56800E Core
Low Voltage
Supervisor
Program Controller
Address
and Hardware Generation Unit
Looping Unit
Data ALU
16 x 16 + 36 -->36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Bit
Manipulation
Unit
PAB
PDB
CDBR
CDBW
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
R/W Control
System Bus
Control
* External
Address Bus
Switch
6
5
* External
Data
Bus Switch
4
A8-13 or GPIOA0-5
GPIOB0-4 or A16-20
D7-10 or GPIOF0-3
IPBus Bridge (IPBB)
* Bus
Control
6
GPIOD0-5 or CS2-7
Peripheral
Device Selects
RW IPAB IPWDB
Control
IPRDB
Clock
resets
PLL
* EMI not functional in
this package; use as
GPIO pins
SCI1 or SCI0 or COP/ Interrupt
GPIOD GPIOE Watchdog Controller
System
P
O
Integration R
Module
Clock O
Generator
S
C
XTAL
EXTAL
4 22
IRQA IRQB
CLKO
CLKMODE
56F8335/56F8135 Block Diagram - 128 LQFP
Freescale Semiconductor
Preliminary
56F8335 Technical Data, Rev. 5
3




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