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Signal Controllers. 56F8166 Datasheet

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Signal Controllers. 56F8166 Datasheet
















56F8166 Controllers. Datasheet pdf. Equivalent













Part

56F8166

Description

(56F8166 / 56F8366) 16-bit Digital Signal Controllers



Feature


www.DataSheet4U.com 56F8366/56F8166 Dat a Sheet Preliminary Technical Data 56F 8300 16-bit Digital Signal Controllers MC56F8366 Rev. 6 01/2007 freescale.co m Document Revision History Version Hi story Rev 0 Rev 1.0 Rev 2.0 Pre-release , Alpha customers only Initial Public R elease Added output voltage maximum val ue and note to clarify in Table 10-1; a lso removed overal.
Manufacture

Freescale Semiconductor

Datasheet
Download 56F8166 Datasheet


Freescale Semiconductor 56F8166

56F8166; l life expectancy note, since life expec tancy is dependent on customer usage an d must be determined by reliability eng ineering. Clarified value and unit meas ure for Maximum allowed PD in Table 10- 3. Corrected note about average value f or Flash Data Retention in Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Deleted formula for Max Ambient O.


Freescale Semiconductor 56F8166

perating Temperature (Automotive) and Ma x Ambient Operating Temperature (Indust rial) and corrected Flash Endurance to 10,000 in Table 10-4. Added RoHS-compli ance and “pb-free” language to back cover Added information/corrected stat e during reset in Table 2-2. Clarified external reference crystal frequency fo r PLL in Table 10-14 by increasing maxi mum value to 8.4MHz. R.


Freescale Semiconductor 56F8166

eplaced “Tri-stated” with an explana tion in State During Reset column in Ta ble 2-2. • Added the following note t o the description of the TMS signal in Table 2-2: Note: Always tie the TMS pin to VDD through a 2.2K resistor. • Ad ded the following note to the descripti on of the TRST signal in Table 2-2: Not e: For normal operation, connect TRST d irectly to VSS. If the des.





Part

56F8166

Description

(56F8166 / 56F8366) 16-bit Digital Signal Controllers



Feature


www.DataSheet4U.com 56F8366/56F8166 Dat a Sheet Preliminary Technical Data 56F 8300 16-bit Digital Signal Controllers MC56F8366 Rev. 6 01/2007 freescale.co m Document Revision History Version Hi story Rev 0 Rev 1.0 Rev 2.0 Pre-release , Alpha customers only Initial Public R elease Added output voltage maximum val ue and note to clarify in Table 10-1; a lso removed overal.
Manufacture

Freescale Semiconductor

Datasheet
Download 56F8166 Datasheet




 56F8166
www.DataSheet4U.com
56F8366/56F8166
Data Sheet
Preliminary Technical Data
56F8300
16-bit Digital Signal Controllers
MC56F8366
Rev. 6
01/2007
freescale.com




 56F8166
Version History
Rev 0
Rev 1.0
Rev 2.0
Rev 3.0
Rev 4.0
Rev 5.0
Rev. 6
Document Revision History
Description of Change
Pre-release, Alpha customers only
Initial Public Release
Added output voltage maximum value and note to clarify in Table 10-1; also removed overall
life expectancy note, since life expectancy is dependent on customer usage and must be
determined by reliability engineering. Clarified value and unit measure for Maximum allowed
PD in Table 10-3. Corrected note about average value for Flash Data Retention in Table 10-4.
Added new RoHS-compliant orderable part numbers in Table 13-1.
Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient
Operating Temperature (Industrial) and corrected Flash Endurance to 10,000 in Table 10-4.
Added RoHS-compliance and “pb-free” language to back cover
Added information/corrected state during reset in Table 2-2. Clarified external reference
crystal frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz.
Replaced “Tri-stated” with an explanation in State During Reset column in Table 2-2.
• Added the following note to the description of the TMS signal in Table 2-2:
Note: Always tie the TMS pin to VDD through a 2.2K resistor.
• Added the following note to the description of the TRST signal in Table 2-2:
Note: For normal operation, connect TRST directly to VSS. If the design is to be used in a debugging
environment, TRST may be tied to VSS through a 1K resistor.
Please see http://www.freescale.com for the most current data sheet revision.
56F8366 Technical Data, Rev. 6
2
Freescale Semiconductor
Preliminary




 56F8166
56F8366/56F8166 General Description
Note: Features in italics are NOT available in the 56F8166 device.
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data memory
• Chip Select Logic for glueless interface to ROM and
SRAM
• 512KB of Program Flash
• 4KB of Program RAM
• 32KB of Data Flash
• 32KB of Data RAM
• 32KB of Boot Flash
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
• Temperature Sensor
• Up to two Quadrature Decoders
• Optional On-Chip Regulator
• Up to two FlexCAN modules
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four General Purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package
OCR_DIS
RSTO EMI_MODE
EXTBOOT
RESET
5
VPP
2
VCAP VDD
47
VSS
5
VDDA
2
VSSA
6 PWM Outputs
PWMA
3 Current Sense Inputs
or GPIOC
3 Fault Inputs
JTAG/
EOnCE
Port
Digital Reg Analog Reg
16-Bit
Low Voltage
56800E Core Supervisor
6 PWM Outputs
PWMB
Program Controller
and
Address
Generation Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Bit
Manipulation
3 Current Sense Inputs
or GPIOD
4 Fault Inputs
Hardware Looping Unit
PAB
Three 16-bit Input Registers
Four 36-bit Accumulators
Unit
4 AD0 ADCA
4 AD1
PDB
CDBR
CDBW
5 VREF
Memory
XDB2
4
4
AD0 ADCB
AD1
Program Memory
256K x 16 Flash
2K x 16 RAM
XAB1
XAB2
4
Temp_Sense
Quadrature
Decoder 0 or
Quad
Boot ROM
16K x 16 Flash
Data Memory
16K x 16 Flash
PAB
PDB
CDBR
CDBW
Timer A or
16K x 16 RAM
R/W Control
System Bus
Control
External
Address Bus
Switch
External Data
Bus Switch
6
2
8
7
9
GPIOC
Quadrature
Bus Control
Decoder 1 or
4 Quad
Timer B or
IPBus Bridge (IPBB)
SPI1 or
GPIOC
Quad
Timer C or
Decoding
Peripheral
Device Selects
RW IPAB
Control
IPWDB
IPRDB
GPIO or
EMI CS or
FlexCAN2
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
A8-15 or GPIOA0-7
GPIOB0 or A16
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
RD
PS / CS0 (GPIOD8)
DS / CS1 (GPIOD9)
GPIOD0 (CS2 or CAN2_TX)
GPIOD1 (CS3 or CAN2_RX)
GPIOE Peripherals
2
Quad
Timer D or
GPIOE
Clock
resets
PLL
2
FlexCAN
SPI0 or
GPIOE
SCI1 or
GPIOD
SCI0 or
COP/
Interrupt
GPIOE Watchdog Controller
System
P
O
Integration R
Module
Clock O
Generator
S
C
XTAL
EXTAL
4 22
IRQA IRQB
CLKO
CLKMODE
56F8366/56F8166 Block Diagram - 144 LQFP
Freescale Semiconductor
Preliminary
56F8366 Technical Data, Rev. 6
3




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