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CMOS microcontroller. KS51850 Datasheet

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CMOS microcontroller. KS51850 Datasheet






KS51850 microcontroller. Datasheet pdf. Equivalent




KS51850 microcontroller. Datasheet pdf. Equivalent





Part

KS51850

Description

4-bit single-chip CMOS microcontroller



Feature


2 KS51850 51850 OVERVIEW KS51850, a 4 -bit single-chip CMOS microcontroller, consists of the reliable SMCS-51 CPU co re with on-chip ROM and RAM. Eight inpu t pins and 11 output pins provide the f lexibility for various I/O requirements . Auto reset circuit generates reset pu lse every certain period, and every hal t mode termination time. The KS51850 mi crocontroller has .
Manufacture

Samsung

Datasheet
Download KS51850 Datasheet


Samsung KS51850

KS51850; been designed for use in small system co ntrol applications that require a low-p ower, cost sensitive design solution. I n addition, the KS51850 has been optimi zed for remote control transmitter and has built-in Transistor for I.R.LED dri ve. FEATURES ROM Size • 1,024 bytes RAM Size • 32 nibbles Instruction Set • 39 instructions Instruction Cycle Time • 13.2 µsec at fxx .


Samsung KS51850

= 455 kHz Input Ports • Two 4-bit port s (24 pins)/one 4-bit, Five1-bit ports (20 pins) Four Transmission Frequencie s • fxx/12 (1/4 duty), fxx/12 (1/3 du ty), fxx/8 (1/2 duty), and no-carrier f requency Built-in Transistor for I.R.LE D Drive • IOL1: 210 ma (typical) at V DD = 3V and VO = 0.4V Supply Voltage 1.8 V-3.6 V (250 kHz ≤ fOSC ≤ 3.9 MHz) 2.2 V-3.6 V (3.9 MHz < f.


Samsung KS51850

OSC ≤ 6 MHz) Power Consumption • Hal t mode: 1 µA (maxium) • Normal mode: 0.5 mA (typical) Output Ports • One 4-bit, Seven 1-bit ports (24pins)/One 4-bit, Five 1-bit ports (20 pins) Built -in Oscillator • Crystal/Ceramic reso nator Built-in Reset Circuit • Power- on reset and auto reset circuit for gen erating reset pulse every 13.1072/fxx ( 288 ms at fxx = 455 kHz) Opera.

Part

KS51850

Description

4-bit single-chip CMOS microcontroller



Feature


2 KS51850 51850 OVERVIEW KS51850, a 4 -bit single-chip CMOS microcontroller, consists of the reliable SMCS-51 CPU co re with on-chip ROM and RAM. Eight inpu t pins and 11 output pins provide the f lexibility for various I/O requirements . Auto reset circuit generates reset pu lse every certain period, and every hal t mode termination time. The KS51850 mi crocontroller has .
Manufacture

Samsung

Datasheet
Download KS51850 Datasheet




 KS51850
2 KS51850
51850
OVERVIEW
KS51850, a 4-bit single-chip CMOS microcontroller, consists of the reliable SMCS-51 CPU core with on-chip
ROM and RAM. Eight input pins and 11 output pins provide the flexibility for various I/O requirements. Auto reset
circuit generates reset pulse every certain period, and every halt mode termination time. The KS51850
microcontroller has been designed for use in small system control applications that require a low-power, cost -
sensitive design solution. In addition, the KS51850 has been optimized for remote control transmitter and has
built-in Transistor for I.R.LED drive.
FEATURES
ROM Size
1,024 bytes
RAM Size
32 nibbles
Instruction Set
39 instructions
Instruction Cycle Time
13.2 µsec at fxx = 455 kHz
Input Ports
Two 4-bit ports (24 pins)/one 4-bit, Five1-bit
ports (20 pins)
Four Transmission Frequencies
fxx/12 (1/4 duty), fxx/12 (1/3 duty), fxx/8 (1/2
duty), and no-carrier frequency
Built-in Transistor for I.R.LED Drive
IOL1: 210 ma (typical) at VDD = 3V and
VO = 0.4V
Supply Voltage
1.8 V-3.6 V (250 kHz fOSC 3.9 MHz)
2.2 V-3.6 V (3.9 MHz < fOSC 6 MHz)
Power Consumption
Halt mode: 1 µA (maxium)
Normal mode: 0.5 mA (typical)
Output Ports
One 4-bit, Seven 1-bit ports (24pins)/One 4-bit,
Five 1-bit ports (20 pins)
Built-in Oscillator
Crystal/Ceramic resonator
Built-in Reset Circuit
Power-on reset and auto reset circuit for
generating reset pulse every 13.1072/fxx (288
ms at fxx = 455 kHz)
Operating temperature
- 20 °C to 85 °C
Package Type
24 SOP, 20 DIP, 20 SOP
Oscillator Frequency divide select
Mask Option = fxx fOSC or fOSC/8
2-1




 KS51850
KS51850
BLOCK DIAGRAM
P2.1 - P2.6
6
Internal P2.13
P2-Output Latch
5
8
ROM
RAM
16 X 2 X 4bits
16
L Decoder
64 X 16 X 8 bits
46
PA PC
2
4
H
4
1
4
PB
4 L4
3-Level Stack
ALU & A
44
4
SF
Internal P2.9 and P2.10
MUX
4
P3 Output Register
(PR)
4
Internal
P2.0
fXX/8 (1/2)
fXX/12 (1/3)
fXX/12 (1/4)
DIV
No Carrier
4
OSC
Auto Reset
HALT
Internal P2.12
P2.0/REM
XI XO
P1.0 - P1.3
P0.0 - P0.3
P3.0 - P3.3
Figure 2-1. Block diagram
2-2




 KS51850
PIN CONFIGURATION (24 SOP)
51850
VSS
XI
XO
P2.6
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P1.3
1 24
2 23
3 22
4 21
5 20
6 KS51850 19
7 (Top View) 18
8 17
9 16
10 15
11 14
12 13
VDD
P2.0/REM
TEST
P2.1
P2.2
P2.3
P2.4
P2.5
P3.0
P3.1
P3.2
P3.3
Figure 2-2. Pin Configuration (24 SOP)
Table 2-1. PIN Description for 24 PINS
Pin
Name
P0.0-P0.3
P1.0-P1.3
P2.0 REM
P2.2-P2.5
P2.1, P2.6
P3.0-P3.3
TEST
XI
XO
VDD
VSS
Pin
Number
5, 6, 7, 8
9, 10, 11, 12
23
20, 19, 18, 17
21, 4
16, 15, 14, 13
22
2
3
24
1
Pin
Type
Input
Input
Output
Output
Description
4-bit input port when P2.13 is low
4-bit input port when P2.13 is high
1-bit individual output for remote carrier
frequency (1)
1-bit individual output port
Output
Input
Input
Output
4-bit parallel output port
Input pin for test (Normally connected to VSS)
Oscillation clock input
Oscillation clock output
Power supply
Ground
I/O Circuit
Type
A
A
B
C
D
C
NOTES:
1. The carrier can be selected by software as fxx/12 (1/3 duty), fxx/12 (1/4 duty), fxx/8 (1/2 duty), or no-carrier
frequency.
2. Package type can be selected as 24 SOP in the ordering sheet.
2-3



Recommended third-party KS51850 Datasheet






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