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Crystal Requirement. ALC100 Datasheet 
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Crystal Requirement. ALC100 Datasheet 

Part  ALC100 
Description  Crystal Requirement 
Feature 
www.DataSheet4U.com Avance Logic, Inc. ALC100 Quartz Crystal Requirement for ALC100/ALC100P This document describes the quartz crystal requirements for cl ocking ALC100/P. 1. Frequency and Oscil lation Circuits ALC100/P are designed t o work from a crystal with 24.576MHz. F ig1 shows the equivalent circuits of c rystal and oscillation circuits within ALC100/P. ALC100/P. 
Manufacture  Avance Logic 
Datasheet 
ALC100; C1 22pF 2. Crystal Requirements Genera l Specifications Holder Type Crystal Fr eq. Oscillation Mode Load Cap. (CL) Fre q. Tolerance(25oC) Effective Series Res istance (Rs) Effective Shunt Capacitanc e (Co) Drive Level Insulation Resistanc e Requirements HC49 U/S 24.576 MHz Fun damental 16 ~20 pF +/ 50 ppm 40 ohm ma x 7 pF CRYSTAL XTALI Cs Rs Co XTALO 24 .576MHz 10pF 10pF . 
22pF C2 Ls < 0.1 mW 500 Mohm min. at DC 100V Table1 Crystal General Specifi cation 3. Load Capacitance (CL) To oper ate between Fs and Fp requires external load capacitance. Although ALC100/P ha s embed internal 10pF capacitors at XTA LI and XTALO, the oscillated frequency may be a little higher than 24.576MHz i f no C1 and C2 placed. To reduce the bi t clock jitter and. 
get more accurate frequency, the extern al capacitor C1 and C2 most be used. AL C100/P C1 22pF 24.576MHz Y1 XTALI 10pF Fig1 oscillation circuits The series resonant frequency 1 Fs ≅ 2π Ls * Cs , and parallel resonant frequency Ls * Cs * Co Cs + Co The oscillated frequen cy between Fs and Fp 2π Cs Fo = Fs * 1 + Co + CL where CL=(C1+10pF)//(C2+10pF ) Fp ≅ 1 Clitter XTAL. 
Part  ALC100 
Description  Crystal Requirement 
Feature 
www.DataSheet4U.com Avance Logic, Inc. ALC100 Quartz Crystal Requirement for ALC100/ALC100P This document describes the quartz crystal requirements for cl ocking ALC100/P. 1. Frequency and Oscil lation Circuits ALC100/P are designed t o work from a crystal with 24.576MHz. F ig1 shows the equivalent circuits of c rystal and oscillation circuits within ALC100/P. ALC100/P. 
Manufacture  Avance Logic 
Datasheet 
www.DataSheet4U.com
Avance Logic, Inc.
ALC100
Quartz Crystal Requirement for ALC100/ALC100P
This document describes the quartz crystal
requirements for clocking ALC100/P.
1. Frequency and Oscillation Circuits
ALC100/P are designed to work from a
crystal with 24.576MHz. Fig1 shows the
equivalent circuits of crystal and oscillation
circuits within ALC100/P.
ALC100/P
CRYSTAL
C1 XTALI
22pF
Cs
10pF
22pF
Rs Co
Ls
XTALO
C2 24.576MHz
10pF
Fig1 oscillation circuits
The series resonant frequency
Fs ≅ 1
2π Ls * Cs
, and parallel resonant frequency
Fp ≅ 1
2π Ls * Cs * Co
Cs + Co
The oscillated frequency between Fs and
Fp
Fo = Fs * 1 + Cs
Co + CL
where CL=(C1+10pF)//(C2+10pF)
2. Crystal Requirements
General Specifications Requirements
Holder Type
HC49 U/S
Crystal Freq.
24.576 MHz
Oscillation Mode
Fundamental
Load Cap. (CL)
16 ~20 pF
Freq. Tolerance(25oC) +/ 50 ppm
Effective Series
Resistance (Rs)
40 ohm max
Effective Shunt
Capacitance (Co)
Drive Level
Insulation Resistance
7 pF
< 0.1 mW
500 Mohm min. at
DC 100V
Table1 Crystal General Specification
3. Load Capacitance (CL)
To operate between Fs and Fp requires
external load capacitance. Although
ALC100/P has embed internal 10pF
capacitors at XTALI and XTALO, the
oscillated frequency may be a little higher
than 24.576MHz if no C1 and C2 placed.
To reduce the bit clock jitter and get more
accurate frequency, the external capacitor
C1 and C2 most be used.
ALC100/P
C1 XTALI
22pF
10pF
24.576MHz Y1
22pF
C2
Clitter
XTALO
10pF
Fig2 Clitter due to PCB Trace
Avance Logic, Inc.
1
Rev 1.0
May 22, 2000

www.DataSheet4U.com
Avance Logic, Inc.
In ideal case, ignore the Clitter at
suggested C1=C2=22pF, the equivalent
load capacitance is
CL = (22 pF + 10 pF ) //(22 pF + 10 pF ) = 16 pF
According to Table1 specification, the
crystal with CL is 16pF is adapted. But in
most case, the litter capacitor (Clitter)
generated by PCB trace is existent. So the
real CL is
CL = (C1 + 10 pF ) //(C2 + 10 pF ) + Clitter
Consider the litter capacitance , crystal with
CL=20pF is allowable.
4. Drive Level
ALC100/P has lower drive capability than
ALC200. To guarantee the successful
oscillation, Crystals with drive level less
than 100mW are recommended.
If used crystal with drive level exceed
100mW or PCB trace capacitance is large,
C1 and C2 must be replaced by lower value
to reduce the drive loading. The
disadvantage of reducing C1 and C2 is
increasing oscillated frequency about
several KHz and get worse bit clock jitter.
To conquer this problem, you can reduce
C2 first. If it still doesn’ t work, reduce C1
and C2 step by step, keep the relation C1 is
larger than C2 to help oscillation occurs.
In most of case, this methodology is useful
to force oscillation and suppress clock jitter.
Avance Logic, Inc.
2
ALC100
Rev 1.0
May 22, 2000

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