DatasheetsPDF.com

Termination Regulator. CM3107 Datasheet

DatasheetsPDF.com

Termination Regulator. CM3107 Datasheet
















CM3107 Regulator. Datasheet pdf. Equivalent













Part

CM3107

Description

2 Amp Source/ Sink Bus Termination Regulator



Feature


CM3107 2 Amp Source/ Sink Bus Terminatio n Regulator for DDR Memory and Front Si de Bus Applications Features Ideal for Intel 865 Front Side Bus VTT and DDR VT T applications • Sinks and sources 2 Amps • Over current protection • Ov er temperature protection • Integrate d power MOSFETs www.DataSheet4U.com • Excellent accuracy (0.5% load regulati on) • Selectable output (1.2.
Manufacture

California Micro Devices

Datasheet
Download CM3107 Datasheet


California Micro Devices CM3107

CM3107; 25V/1.45V or VDDQ/2) • 8-lead SOIC and PSOP packages • Lead-free versions a vailable • Product Description The C M3107 is a sinking and sourcing regulat or specifically designed for series-par allel bus termination for high-speed ch ip set busses as well as DDR memory sys tems. It can source and sink current up to 2.0A with a load regulation of 0.5% . The VTT output voltage.


California Micro Devices CM3107

is selectable by VDDQSEL and FSBSEL pin s. The VDDQSEL pin controls whether the CM3107 is in DDR memory mode with VTT= VDDQ/2, or in FSB mode. In FSB mode, FS BSEL controls whether VTT is 1.225V or 1.45V. This allows the same chip to be used in two different circuits on an In tel 865-based motherboard. The CM3107 p rovides over current and over temperatu re protection, whi.


California Micro Devices CM3107

ch protect the chip from excessive heati ng due to high current and high tempera ture. A shutdown capability using an ex ternal transistor reduces power consump tion and provides a high impedance outp ut. The CM3107 is housed in 8-lead SOIC and PSOP packages and is available wit h optional lead-free finishing. Applic ations • • • • Intel 865/845 Fr ont Side Bus termination S.





Part

CM3107

Description

2 Amp Source/ Sink Bus Termination Regulator



Feature


CM3107 2 Amp Source/ Sink Bus Terminatio n Regulator for DDR Memory and Front Si de Bus Applications Features Ideal for Intel 865 Front Side Bus VTT and DDR VT T applications • Sinks and sources 2 Amps • Over current protection • Ov er temperature protection • Integrate d power MOSFETs www.DataSheet4U.com • Excellent accuracy (0.5% load regulati on) • Selectable output (1.2.
Manufacture

California Micro Devices

Datasheet
Download CM3107 Datasheet




 CM3107
CM3107
2 Amp Source/ Sink Bus Termination Regulator
for DDR Memory and Front Side Bus Applications
Features
• Ideal for Intel 865 Front Side Bus VTT and DDR
VTT applications
• Sinks and sources 2 Amps
• Over current protection
• Over temperature protection
www.DataSheet4U.cIonmtegrated power MOSFETs
• Excellent accuracy (0.5% load regulation)
• Selectable output (1.225V/1.45V or VDDQ/2)
• 8-lead SOIC and PSOP packages
• Lead-free versions available
Applications
• Intel 865/845 Front Side Bus termination
• Single and dual DDR memory termination
• Active termination buses
• Graphics card DDR memory termination
Product Description
The CM3107 is a sinking and sourcing regulator specif-
ically designed for series-parallel bus termination for
high-speed chip set busses as well as DDR memory
systems. It can source and sink current up to 2.0A with
a load regulation of 0.5%. The VTT output voltage is
selectable by VDDQSEL and FSBSEL pins. The
VDDQSEL pin controls whether the CM3107 is in DDR
memory mode with VTT=VDDQ/2, or in FSB mode. In
FSB mode, FSBSEL controls whether VTT is 1.225V or
1.45V. This allows the same chip to be used in two dif-
ferent circuits on an Intel 865-based motherboard.
The CM3107 provides over current and over tempera-
ture protection, which protect the chip from excessive
heating due to high current and high temperature. A
shutdown capability using an external transistor
reduces power consumption and provides a high
impedance output.
The CM3107 is housed in 8-lead SOIC and PSOP
packages and is available with optional lead-free finish-
ing.
Simplified Electrical Schematic
VCC
VDDQSEL FSBSEL
VDDQ
Over Temp
Over Current
Reference
VREF
OUT
Buffer
IN
Output
Select
Driver
VTT
VSENSE
GND
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214
L Fax: 408.263.7846 L www.calmicro.com
1




 CM3107
CM3107
PACKAGE / PINOUT DIAGRAM
TOP VIEW
TOP VIEW
www.DataSheet4U.com
VDDQ
VTT
GND
VSENSE
18
27
36
45
8-lead SOIC
Note: This drawing is not to scale.
VCC
VDDQSEL
VREF
FSBSEL
VDDQ
VTT
GND
VSENSE
18
27
GND
36
45
VCC
VDDQSEL
VREF
FSBSEL
8-lead PSOP
PIN DESCRIPTIONS
SOIC-8
LEAD(S)
NAME DESCRIPTION
1
VDDQ
VDDQ
2 VTT Outputs either 1.225V/1.45V FSB or VDDQ/2 DDR (See note 1)
3 GND Ground
4 VSENSE Feedback voltage input
5 FSBSEL Selects FSB output for either VTT=1.225V or 1.45V
6 VREF 1.25V reference voltage input for DDR bus
7 VDDQSEL Select output to support FSB or DDR applications
8 VCC Power for internal control circuits
Note 1: Assumes VDDQ and VDDQSEL are tied together in DDR application.
Ordering Information
PART NUMBERING INFORMATION
Pins
8
8
Package
PSOP-8
SOIC-8
Standard Finish
Ordering Part
Number1
Part Marking
CM3107-00SB
CM3107-00SB
CM3107-00SN
CM310701S
Lead-free Finish
Ordering Part
Number1
Part Marking
CM3107-12SH
CM3107-00SH
CM3107-00SM
CM3107-00SM
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
2 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214
L Fax: 408.263.7846 L www.calmicro.com
02/02/04




 CM3107
CM3107
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
VCC Operating Supply Voltage
7V
VDDQ Input Voltage
7V
Pin Voltages
VTT Output
www.DataSheet4U.comAny other pins
ESD (HBM)
7
7
±2000
V
V
V
Storage Temperature Range
-40 to +150
°C
Operating Temperature Range
Ambient
Junction
-40 to +85
-40 to +150
°C
°C
Power Dissipation (see note 1)
Internally Limited
W
Note 1: These devices must be derated based on thermal resistance at elevated temperatures. The device packaged in a 8-lead
SOIC leadframe must be derated at θJA = 151°C/W . θJA of the 8-lead PSOP is 40°C/W.
STANDARD OPERATING CONDITIONS
PARAMETER
VDDQ
VCC
Ambient Operating Temperature
CVOUT
VALUE
2.5 to 3.3
2.5 to 3.3
0 to +70
220 ±20%
UNITS
V
V
°C
µF
© 2004 California Micro Devices Corp. All rights reserved.
02/02/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214
L Fax: 408.263.7846 L www.calmicro.com
3




Recommended third-party CM3107 Datasheet







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)