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CMOS device. 74AHCT2G00 Datasheet

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CMOS device. 74AHCT2G00 Datasheet






74AHCT2G00 device. Datasheet pdf. Equivalent




74AHCT2G00 device. Datasheet pdf. Equivalent





Part

74AHCT2G00

Description

high-speed Si-gate CMOS device



Feature


INTEGRATED CIRCUITS DATA SHEET www.Data Sheet4U.com 74AHC2G00; 74AHCT2G00 2-in put NAND gate Product specification 20 04 Jan 21 Philips Semiconductors Prod uct specification 2-input NAND gate F EATURES • Symmetrical output impedanc e • High noise immunity • ESD prote ction: – HBM EIA/JESD22-A114-A exceed s 2000 V – MM EIA/JESD22-A115-A excee ds 200 V www.DataSheet4U.com 74.
Manufacture

NXP Semiconductors

Datasheet
Download 74AHCT2G00 Datasheet


NXP Semiconductors 74AHCT2G00

74AHCT2G00; AHC2G00; 74AHCT2G00 DESCRIPTION The 74AH C2G/AHCT2G00 is a high-speed Si-gate CM OS device. The 74AHC2G/AHCT2G00 provide s the 2-input NAND gate function. – CDM EIA/JESD22-C101 exceeds 500 V. • Low power dissipation • Balanced pro pagation delays • SOT505-2 and SOT765 -1 package • Specified from −40 to +85 °C and −40 to +125 °C. QUICK RE FERENCE DATA GND = 0 V; Tamb = 25 .


NXP Semiconductors 74AHCT2G00

°C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used t o determine the dynamic power dissipati on (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output fr equency in MHz; CL = output load capaci tance in pF; VCC = supply voltage in Vo lts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of t.


NXP Semiconductors 74AHCT2G00

he outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay nA and nB to nY input capacitance power d issipation capacitance per gate CL = 50 pF; f = 1 MHz; notes 1 and 2 CONDITION S AHC2G CL = 15 pF; VCC = 5 V 3.5 1.5 1 7 AHCT2G 3.6 1.5 18 ns pF pF UNIT 2004 Jan 21 2 Philips Semiconductors Pro duct specification 2-input NAND gate FUNCTION TABLE See n.

Part

74AHCT2G00

Description

high-speed Si-gate CMOS device



Feature


INTEGRATED CIRCUITS DATA SHEET www.Data Sheet4U.com 74AHC2G00; 74AHCT2G00 2-in put NAND gate Product specification 20 04 Jan 21 Philips Semiconductors Prod uct specification 2-input NAND gate F EATURES • Symmetrical output impedanc e • High noise immunity • ESD prote ction: – HBM EIA/JESD22-A114-A exceed s 2000 V – MM EIA/JESD22-A115-A excee ds 200 V www.DataSheet4U.com 74.
Manufacture

NXP Semiconductors

Datasheet
Download 74AHCT2G00 Datasheet




 74AHCT2G00
INTEGRATED CIRCUITS
DATA SHEET
www.DataSheet4U.com
74AHC2G00; 74AHCT2G00
2-input NAND gate
Product specification
2004 Jan 21




 74AHCT2G00
Philips Semiconductors
2-input NAND gate
Product specification
74AHC2G00; 74AHCT2G00
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
www.DataSheet4U.cCoDmM EIA/JESD22-C101 exceeds 500 V.
Low power dissipation
Balanced propagation delays
SOT505-2 and SOT765-1 package
Specified from 40 to +85 °C and 40 to +125 °C.
DESCRIPTION
The 74AHC2G/AHCT2G00 is a high-speed Si-gate CMOS
device.
The 74AHC2G/AHCT2G00 provides the 2-input NAND
gate function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
CI
CPD
propagation delay nA and nB to nY
input capacitance
power dissipation capacitance per
gate
CL = 15 pF; VCC = 5 V
CL = 50 pF; f = 1 MHz;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
TYPICAL
AHC2G
3.5
1.5
17
AHCT2G
3.6
1.5
18
UNIT
ns
pF
pF
2004 Jan 21
2




 74AHCT2G00
Philips Semiconductors
2-input NAND gate
Product specification
74AHC2G00; 74AHCT2G00
FUNCTION TABLE
See note 1.
www.DataSheet4U.com
nA
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
INPUT
nB
L
H
L
H
OUTPUT
nY
H
H
H
L
ORDERING INFORMATION
TYPE NUMBER
74AHC2G00DP
74AHCT2G00DP
74AHC2G00DC
74AHCT2G00DC
TEMPERATURE
RANGE
40 to +125 °C
40 to +125 °C
40 to +125 °C
40 to +125 °C
PINS
8
8
8
8
PACKAGE
PACKAGE MATERIAL CODE MARKING
TSSOP8
TSSOP8
VSSOP8
VSSOP8
plastic
plastic
plastic
plastic
SOT505-2
SOT505-2
SOT765-1
SOT765-1
A00
C00
A00
C00
PINNING
PIN
1
2
3
4
5
6
7
8
SYMBOL
1A
1B
2Y
GND
2A
2B
1Y
VCC
data input
data input
data output
ground (0 V)
data input
data input
data output
supply voltage
DESCRIPTION
2004 Jan 21
3



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