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buffer/line driver. 74AHC2G241 Datasheet

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buffer/line driver. 74AHC2G241 Datasheet






74AHC2G241 driver. Datasheet pdf. Equivalent




74AHC2G241 driver. Datasheet pdf. Equivalent





Part

74AHC2G241

Description

Dual buffer/line driver



Feature


74AHC2G241; 74AHCT2G241 Dual buffer/lin e driver; 3-state Rev. 3 — 13 May 201 3 Product data sheet 1. General descr iption The 74AHC2G241; 74AHCT2G241 is a high-speed Si-gate CMOS device. The 7 4AHC2G241; 74AHCT2G241 is a dual non-in verting buffer/line driver with 3-state outputs. The 3-state outputs are contr olled by the output enable inputs 1OE a nd 2OE. A HIGH level.
Manufacture

NXP Semiconductors

Datasheet
Download 74AHC2G241 Datasheet


NXP Semiconductors 74AHC2G241

74AHC2G241; at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. Schmitt-trig ger action at all inputs makes the circ uit highly tolerant for slower input ri se and fall times. 2. Features and ben efits  Symmetrical output impedance  High noise immunity  ESD protect ion:  HBM JESD22-A114E:.


NXP Semiconductors 74AHC2G241

exceeds 2000 V  MM JESD22-A115-A: ex ceeds 200 V  CDM JESD22-C101C: excee ds 1000 V  Low power dissipation  Balanced propagation delays  Multip le package options  Specified from 40 C to +85 C and from 40 C to +125 C .


NXP Semiconductors 74AHC2G241

.

Part

74AHC2G241

Description

Dual buffer/line driver



Feature


74AHC2G241; 74AHCT2G241 Dual buffer/lin e driver; 3-state Rev. 3 — 13 May 201 3 Product data sheet 1. General descr iption The 74AHC2G241; 74AHCT2G241 is a high-speed Si-gate CMOS device. The 7 4AHC2G241; 74AHCT2G241 is a dual non-in verting buffer/line driver with 3-state outputs. The 3-state outputs are contr olled by the output enable inputs 1OE a nd 2OE. A HIGH level.
Manufacture

NXP Semiconductors

Datasheet
Download 74AHC2G241 Datasheet




 74AHC2G241
74AHC2G241; 74AHCT2G241
Dual buffer/line driver; 3-state
Rev. 3 — 13 May 2013
Product data sheet
1. General description
The 74AHC2G241; 74AHCT2G241 is a high-speed Si-gate CMOS device.
The 74AHC2G241; 74AHCT2G241 is a dual non-inverting buffer/line driver with 3-state
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A
HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW
level at pin 2OE causes output 2Y to assume a high-impedance OFF-state.
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise
and fall times.
2. Features and benefits
Symmetrical output impedance
High noise immunity
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Low power dissipation
Balanced propagation delays
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74AHC2G241DP 40 C to +125 C TSSOP8
74AHCT2G241DP
74AHC2G241DC 40 C to +125 C VSSOP8
74AHCT2G241DC
74AHC2G241GD 40 C to +125 C XSON8
74AHCT2G241GD
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Version
SOT505-2
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm




 74AHC2G241
NXP Semiconductors
74AHC2G241; 74AHCT2G241
Dual buffer/line driver; 3-state
4. Marking
Table 2. Marking
Type number
74AHC2G241DP
74AHCT2G241DP
74AHC2G241DC
74AHCT2G241DC
74AHC2G241GD
74AHCT2G241GD
Marking code[1]
A241
C241
A41
C41
A41
C41
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1 1OE
2 1A
7 2OE
5 2A
1Y 6
2Y 3
Fig 1. Logic symbol
001aaa409
6. Pinning information
6.1 Pinning
74AHC2G241
74AHCT2G241
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
001aaj391
Fig 3. Pin configuration SOT505-2 (TSSOP8) and
SOT765-1 (VSSOP8)
2
1
1
EN1
6
5
7
2
EN2
3
001aaa408
Fig 2. IEC logic symbol
74AHC2G241
74AHCT2G241
1OE 1
1A 2
8 VCC
7 2OE
2Y 3
6 1Y
GND 4
5 2A
001aaj392
Transparent top view
Fig 4. Pin configuration SOT996-2 (XSON8)
74AHC_AHCT2G241
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 13 May 2013
© NXP B.V. 2013. All rights reserved.
2 of 17




 74AHC2G241
NXP Semiconductors
74AHC2G241; 74AHCT2G241
Dual buffer/line driver; 3-state
6.2 Pin description
Table 3.
Symbol
1OE
1A
2Y
GND
2A
1Y
2OE
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
Description
output enable input (active LOW)
data input
data output
ground (0 V)
data input
data output
output enable input (active HIGH)
supply voltage
7. Functional description
Table 4.
Input
1OE
L
L
H
Function table[1]
1A
L
H
X
Output
1Y
L
H
Z
Input
2OE
H
H
L
2A
L
H
X
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8. Limiting values
Output
2Y
L
H
Z
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
VCC supply voltage
VI input voltage
IIK
input clamping current
VI < 0.5 V
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
IO output current
0.5 V < VO < VCC + 0.5 V
0.5
0.5
[1] 20
[1] -
-
+7.0
+7.0
-
20
25
V
V
mA
mA
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 C to +125 C
-
75
65
[2] -
75
-
+150
250
mA
mA
C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C the value of Ptot derates linearly with 8 mW/K.
For XSON8 package: above 45 C the value of Ptot derates linearly with 2.4 mW/K.
74AHC_AHCT2G241
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 13 May 2013
© NXP B.V. 2013. All rights reserved.
3 of 17



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