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Audio Processor. ADAU1401 Datasheet

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Audio Processor. ADAU1401 Datasheet






ADAU1401 Processor. Datasheet pdf. Equivalent




ADAU1401 Processor. Datasheet pdf. Equivalent





Part

ADAU1401

Description

SigmaDSP 28-/56-Bit Audio Processor



Feature


Data Sheet SigmaDSP 28-/56-Bit Audio Pr ocessor with Two ADCs and Four DACs ADA U1401 FEATURES 28-/56-bit, 50 MIPS dig ital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete s tandalone operation Self-boot from seri al EEPROM Auxiliary ADC with 4-input mu x for analog control GPIOs for digital controls and outputs F.
Manufacture

Analog Devices

Datasheet
Download ADAU1401 Datasheet


Analog Devices ADAU1401

ADAU1401; ully programmable with SigmaStudio graph ical tool 28-bit × 28-bit multiplier w ith 56-bit accumulator for full double- precision processing Clock oscillator f or generating master clock from crystal PLL for generating master clock from 6 4 × fS, 256 × fS, 384 × fS, or 512 fS clocks Flexible serial data input/ output ports with I2S-compatible, left- justified, right-justif.


Analog Devices ADAU1401

ied, and TDM modes Sampling rates of up to 192 kHz supported On-chip voltage re gulator for compatibility with 3.3 V sy stems 48-lead, plastic LQFP APPLICATION S Multimedia speaker systems MP3 player speaker docks Automotive head units Mi nicomponent stereos Digital televisions Studio monitors Speaker crossovers Mus ical instrument effects processors In-s eat sound systems .


Analog Devices ADAU1401

(aircraft/motor coaches) GENERAL DESCRI PTION The ADAU1401 is a complete single -chip audio system with a 28-/56-bit au dio DSP, ADCs, DACs, and microcontrolle r-like control interfaces. Signal proce ssing includes equalization, cross over , bass enhancement, multiband dynamics processing, delay compensation, speaker compensation, and stereo image widenin g. This processing.

Part

ADAU1401

Description

SigmaDSP 28-/56-Bit Audio Processor



Feature


Data Sheet SigmaDSP 28-/56-Bit Audio Pr ocessor with Two ADCs and Four DACs ADA U1401 FEATURES 28-/56-bit, 50 MIPS dig ital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete s tandalone operation Self-boot from seri al EEPROM Auxiliary ADC with 4-input mu x for analog control GPIOs for digital controls and outputs F.
Manufacture

Analog Devices

Datasheet
Download ADAU1401 Datasheet




 ADAU1401
Data Sheet
SigmaDSP 28-/56-Bit Audio Processor
with Two ADCs and Four DACs
ADAU1401
FEATURES
28-/56-bit, 50 MIPS digital audio processor
2 ADCs: SNR of 100 dB, THD + N of −83 dB
4 DACs: SNR of 104 dB, THD + N of −90 dB
Complete standalone operation
Self-boot from serial EEPROM
Auxiliary ADC with 4-input mux for analog control
GPIOs for digital controls and outputs
Fully programmable with SigmaStudio graphical tool
28-bit × 28-bit multiplier with 56-bit accumulator for full
double-precision processing
Clock oscillator for generating master clock from crystal
PLL for generating master clock from 64 × fS, 256 × fS,
384 × fS, or 512 × fS clocks
Flexible serial data input/output ports with I2S-compatible,
left-justified, right-justified, and TDM modes
Sampling rates of up to 192 kHz supported
On-chip voltage regulator for compatibility with 3.3 V systems
48-lead, plastic LQFP
APPLICATIONS
Multimedia speaker systems
MP3 player speaker docks
Automotive head units
Minicomponent stereos
Digital televisions
Studio monitors
Speaker crossovers
Musical instrument effects processors
In-seat sound systems (aircraft/motor coaches)
GENERAL DESCRIPTION
The ADAU1401 is a complete single-chip audio system with a
28-/56-bit audio DSP, ADCs, DACs, and microcontroller-like
control interfaces. Signal processing includes equalization, cross
over, bass enhancement, multiband dynamics processing, delay
compensation, speaker compensation, and stereo image widening.
This processing can be used to compensate for real-world limita-
tions of speakers, amplifiers, and listening environments,
providing dramatic improvements in perceived audio quality.
Its signal processing is comparable to that found in high end
studio equipment. Most processing is done in full 56-bit, double
precision mode, resulting in very good low level signal perfor-
mance. The ADAU1401 is a fully programmable DSP. The easy
to use SigmaStudio™ software allows the user to graphically
configure a custom signal processing flow using blocks such as
biquad filters, dynamics processors, level controls, and GPIO
interface controls.
ADAU1401 programs can be loaded on power-up either from a
serial EEPROM through its own self-boot mechanism or from
an external microcontroller. On power-down, the current state
of the parameters can be written back to the EEPROM from the
ADAU1401 to be recalled the next time the program is run.
Two Σ-Δ ADCs and four Σ-Δ DACs provide a 98.5 dB analog
input to analog output dynamic. Each ADC has a THD + N of
−83 dB, and each DAC has a THD + N of −90 dB. Digital input
and output ports allow a glueless connection to additional
ADCs and DACs. The ADAU1401 communicates through an
I2C® bus or a 4-wire SPI port.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2012 Analog Devices, Inc. All rights reserved.




 ADAU1401
ADAU1401
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Analog Performance .................................................................... 5
Digital Input/Output.................................................................... 7
Power.............................................................................................. 7
Temperature Range ...................................................................... 7
PLL and Oscillator........................................................................ 7
Regulator........................................................................................ 8
Digital Timing Specifications ..................................................... 8
Absolute Maximum Ratings.......................................................... 11
Thermal Resistance .................................................................... 11
ESD Caution................................................................................ 11
Pin Configuration and Function Descriptions........................... 12
Typical Performance Characteristics ........................................... 15
System Block Diagram ................................................................... 16
Theory of Operation ...................................................................... 17
Initialization .................................................................................... 18
Power-Up Sequence ................................................................... 18
Control Registers Setup ............................................................. 18
Recommended Program/Parameter Loading Procedure ..... 18
Power Reduction Modes............................................................ 18
Using the Oscillator.................................................................... 19
Setting Master Clock/PLL Mode .............................................. 19
Voltage Regulator ....................................................................... 20
Audio ADCs .................................................................................... 21
Audio DACs .................................................................................... 22
Control Ports ................................................................................... 23
I2C Port ........................................................................................ 24
SPI Port ........................................................................................ 27
Self-Boot ...................................................................................... 28
Signal Processing ............................................................................ 30
Numeric Formats........................................................................ 30
Programming .............................................................................. 30
Data Sheet
RAMs and Registers ....................................................................... 31
Address Maps.............................................................................. 31
Parameter RAM.......................................................................... 31
Data RAM ................................................................................... 31
Read/Write Data Formats ......................................................... 31
Control Register Map..................................................................... 33
Control Register Details ................................................................ 35
2048 to 2055 (0x0800 to 0x0807)—Interface Registers......... 35
2056 (0x808)—GPIO Pin Setting Register.............................. 36
2057 to 2060 (0x809 to 0x80C)—Auxiliary ADC Data
Registers....................................................................................... 37
2064 to 2068 (0x0810 to 0x814)—Safeload Data Registers .. 38
2069 to 2073 (0x0815 to 0x819)—Safeload Address
Registers....................................................................................... 38
2074 to 2075 (0x081A to 0x081B)—Data Capture Registers 39
2076 (0x081C)—DSP Core Control Register ......................... 40
2078 (0x081E)—Serial Output Control Register ................... 41
2079 (0x081F)—Serial Input Control Register....................... 42
2080 to 2081 (0x0820 to 0x0821)—Multipurpose Pin
Configuration Registers............................................................. 43
2082 (0x0822)—Auxiliary ADC and Power Control ............ 44
2084 (0x0824)—Auxiliary ADC Enable.................................. 44
2086 (0x0826)—Oscillator Power-Down................................ 44
2087 (0x0827)—DAC Setup...................................................... 44
Multipurpose Pins .......................................................................... 45
Auxiliary ADC............................................................................ 45
General-Purpose Input/Output Pins ....................................... 45
Serial Data Input/Output Ports ................................................ 45
Layout Recommendations............................................................. 48
Parts Placement .......................................................................... 48
Grounding ................................................................................... 48
Typical Application Schematics.................................................... 49
Self-Boot Mode........................................................................... 49
I2C Control .................................................................................. 50
SPI Control.................................................................................. 51
Outline Dimensions ....................................................................... 52
Ordering Guide .......................................................................... 52
Rev. C | Page 2 of 52




 ADAU1401
Data Sheet
REVISION HISTORY
1/12—Rev. B to Rev. C
Changed Pin Number Range from 43 to 46 to Pin Number 43
Only (Table 11) ................................................................................14
Changes to Ordering Guide...........................................................52
1/11—Rev. A to Rev. B
Changes to Figure 1...........................................................................4
Changes to Figure 7 and Table 11 .................................................12
Changes to Figure 20 and Figure 21 .............................................25
Changes to Figure 27 ......................................................................27
4/08—Rev. 0 to Rev. A
Changes to Figure 1...........................................................................4
Changes to Table 11 ........................................................................12
ADAU1401
Replaced Figure 8 to Figure 11......................................................15
Renamed Theory of Operation Section ......................................17
Changes to Initialization Section ..................................................18
Change to Setting the Master Clock/PLL Mode Section ...........19
Replaced Figure 22 through Figure 25 .........................................26
Changes to EEPROM Format Section..........................................28
Deleted Table 21, Renumbered Sequentially...............................29
Inserted Figure 28, Renumbered Sequentially ............................29
Changes to Figure 37 ......................................................................49
Changes to Figure 38 ......................................................................50
Changes to Figure 39 ......................................................................51
7/07—Revision 0: Initial Version
Rev. C | Page 3 of 52






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