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Silicon-Gate CMOS. KK4001B Datasheet

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Silicon-Gate CMOS. KK4001B Datasheet
















KK4001B CMOS. Datasheet pdf. Equivalent













Part

KK4001B

Description

Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS



Feature


www.DataSheet4U.com TECHNICAL DATA KK4 001B Quad 2-Input NOR Gate High-Voltag e Silicon-Gate CMOS The KK4001B NOR gat es provide the system designer with dir ect emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA a t 18 V over full package-temperature ra nge; 100 nA at 18 V and 25°C • Noise margin (over full package.
Manufacture

KODENSHI KOREA

Datasheet
Download KK4001B Datasheet


KODENSHI KOREA KK4001B

KK4001B; temperature range): 0.5 V min @ 5.0 V s upply 1.0 V min @ 10.0 V supply 1.5 V m in @ 15.0 V supply ORDERING INFORMATION KK4001BN Plastic KK4001BD SOIC TA = -5 5° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE PIN 14 =VCC PIN 7 = GND A L L H H Inpu ts B L H L H Output Y H L L L L – LO W voltage level H – HIGH voltage leve l 1 www.DataSheet4U.co.


KODENSHI KOREA KK4001B

m KK4001B MAXIMUM RATINGS* Symbol VCC VIN IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC In put Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package + Power Dissipation per Output Transist or Storage Temperature Lead Temperature , 1 mm from Case for 10 Seconds (Plasti c DIP or SOIC Pack.


KODENSHI KOREA KK4001B

age) Value -0.5 to +20 -0.5 to VCC +0.5 ±10 500 500 100 -65 to +150 260 Unit V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional opera tion should be restricted to the Recomm ended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDE.




Part

KK4001B

Description

Quad 2-Input NOR Gate High-Voltage Silicon-Gate CMOS



Feature


www.DataSheet4U.com TECHNICAL DATA KK4 001B Quad 2-Input NOR Gate High-Voltag e Silicon-Gate CMOS The KK4001B NOR gat es provide the system designer with dir ect emplementation of the NOR function. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA a t 18 V over full package-temperature ra nge; 100 nA at 18 V and 25°C • Noise margin (over full package.
Manufacture

KODENSHI KOREA

Datasheet
Download KK4001B Datasheet




 KK4001B
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TECHNICAL DATA
KK4001B
Quad 2-Input NOR Gate
High-Voltage Silicon-Gate CMOS
The KK4001B NOR gates provide the system designer with direct
emplementation of the NOR function.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
0.5 V min @ 5.0 V supply
1.0 V min @ 10.0 V supply
1.5 V min @ 15.0 V supply
ORDERING INFORMATION
KK4001BN Plastic
KK4001BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
Output
Y
H
L
L
L
L – LOW voltage level
H – HIGH voltage level
1




 KK4001B
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KK4001B
MAXIMUM RATINGS*
Symbol
Parameter
Value
VCC DC Supply Voltage (Referenced to GND)
VIN DC Input Voltage (Referenced to GND)
IIN DC Input Current, per Pin
PD Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
-0.5 to +20
-0.5 to VCC +0.5
±10
500
500
Ptot Power Dissipation per Output Transistor
100
Tstg Storage Temperature
-65 to +150
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
Unit
V
V
mA
mW
mW
°C
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
VIN, VOUT
TA
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min Max Unit
3.0 18
V
0 VCC V
-55 +125
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or
VOUT)VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2




 KK4001B
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KK4001B
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VIH Minimum High-Level VOUT=0.5V
Input Voltage
VOUT=1.0 V
VOUT=1.5V
VIL Maximum Low -
VOUT=0.5 V or VCC - 0.5 V
Level Input Voltage VOUT=1.0 V or VCC - 1.0 V
VOUT=1.5 V or VCC - 1.5 V
VOH Minimum High-Level VIN=GND
Output Voltage
VOL Maximum Low-Level VIN=GND or VCC
Output Voltage
IIN Maximum Input
Leakage Current
VIN= GND or VCC
ICC Maximum Quiescent VIN= GND or VCC
Supply Current
(per Package)
IOL Minimum Output
VIN= GND or VCC
Low (Sink) Current UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
IOH Minimum Output
VIN= GND or VCC
High (Source) Current UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
VCC Guaranteed Limit
V -55°C 25°C 125 Unit
°C
5.0 3.5
10 7
15 11
3.5 3.5 V
77
11 11
5.0 1.5
10 3
15 4
1.5 1.5 V
33
44
5.0 4.95 4.95 4.95 V
10 9.95 9.95 9.95
15 14.95 14.95 14.95
5.0 0.05
10 0.05
15 0.05
0.05 0.05 V
0.05 0.05
0.05 0.05
18 ±0.1 ±0.1 ±1.0 µA
5.0 0.25
10 0.5
15 1.0
20 5.0
0.25 7.5 µA
0.5 15
1.0 30
5.0 150
5.0 0.64
10 1.6
15 4.2
mA
0.51 0.36
1.3 0.9
3.4 2.4
mA
5.0 -2.0 -1.6 -1.15
5.0 -0.64 -0.51 -0.36
10 -1.6 -1.3 -0.9
15 -4.2 -3.4 -2.4
3




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