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Power-Transistor. IPB80CN10NG Datasheet

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Power-Transistor. IPB80CN10NG Datasheet
















IPB80CN10NG Power-Transistor. Datasheet pdf. Equivalent













Part

IPB80CN10NG

Description

Power-Transistor



Feature


IPB80CN10N G IPD78CN10N G IPI80CN10N G I PP80CN10N G IPU78CN10N G OptiMOS®2 Po wer-Transistor Features • N-channel, normal level • Excellent gate charge x R DS(on) product (FOM) • Very low o n-resistance R DS(on) • 175 °C opera ting temperature • Pb-free lead plati ng; RoHS compliant • Qualified accord ing to JEDEC1) for target application Product Summary V DS R DS(on),ma.
Manufacture

Infineon Technologies

Datasheet
Download IPB80CN10NG Datasheet


Infineon Technologies IPB80CN10NG

IPB80CN10NG; x (TO252) ID 100 78 13 V mΩ A • Ide al for high-frequency switching and syn chronous rectification Type IPB80CN10N G IPD78CN10N G IPI80CN10N G IPP80CN10N G IPU78CN10N G Package Marking PG-TO2 63-3 80CN10N PG-TO252-3 78CN10N PG-TO 262-3 80CN10N PG-TO220-3 80CN10N PG-T O251-3 78CN10N Maximum ratings, at T j =25 °C, unless otherwise specified Par ameter www.DataSheet4U..


Infineon Technologies IPB80CN10NG

com Symbol Conditions ID T C=25 °C T C =100 °C Value 13 9 52 17 6 ±20 Unit A Continuous drain current Pulsed dr ain current2) Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage3) Power dissipation Operating a nd storage temperature IEC climatic cat egory; DIN IEC 68-1 1) I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 ° C I D=13 A, R GS=25 Ω .


Infineon Technologies IPB80CN10NG

I D=13 A, V DS=80 V, di /dt =100 A/µs, T j,max=175 °C mJ kV/µs V W °C T C =25 °C 31 -55 ... 175 55/175/56 J-ST D20 and JESD22 see figure 3 2) 3) Tj max=150°C and duty cycle D=0.01 for Vg s<-5V page 1 2006-06-02 Rev. 1.01 IPB 80CN10N G IPD78CN10N G IPI80CN10N G IPP 80CN10N G IPU78CN10N G Parameter Symbol Conditions min. Thermal characteristic s Thermal resistance, ju.





Part

IPB80CN10NG

Description

Power-Transistor



Feature


IPB80CN10N G IPD78CN10N G IPI80CN10N G I PP80CN10N G IPU78CN10N G OptiMOS®2 Po wer-Transistor Features • N-channel, normal level • Excellent gate charge x R DS(on) product (FOM) • Very low o n-resistance R DS(on) • 175 °C opera ting temperature • Pb-free lead plati ng; RoHS compliant • Qualified accord ing to JEDEC1) for target application Product Summary V DS R DS(on),ma.
Manufacture

Infineon Technologies

Datasheet
Download IPB80CN10NG Datasheet




 IPB80CN10NG
IPB80CN10N G IPD78CN10N G
IPI80CN10N G IPP80CN10N G IPU78CN10N G
OptiMOS®2 Power-Transistor
Features
• N-channel, normal level
• Excellent gate charge x R DS(on) product (FOM)
• Very low on-resistance R DS(on)
Product Summary
V DS
R DS(on),max (TO252)
ID
100 V
78 m
13 A
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
• Qualified according to JEDEC1) for target application
• Ideal for high-frequency switching and synchronous rectification
Type
IPB80CN10N G IPD78CN10N G IPI80CN10N G IPP80CN10N G IPU78CN10N G
Package
Marking
PG-TO263-3
80CN10N
PG-TO252-3
78CN10N
PG-TO262-3
80CN10N
PG-TO220-3
80CN10N
PG-TO251-3
78CN10N
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol Conditions
www.DataSheet4U.com
Continuous drain current
I D T C=25 °C
T C=100 °C
Pulsed drain current2)
I D,pulse T C=25 °C
Avalanche energy, single pulse
E AS I D=13 A, R GS=25
Reverse diode dv /dt
dv /dt
I D=13 A, V DS=80 V,
di /dt =100 A/µs,
T j,max=175 °C
Gate source voltage3)
V GS
Power dissipation
P tot T C=25 °C
Operating and storage temperature T j, T stg
IEC climatic category; DIN IEC 68-1
1)J-STD20 and JESD22
2) see figure 3
3) Tjmax=150°C and duty cycle D=0.01 for Vgs<-5V
Rev. 1.01
page 1
Value
13
9
52
17
6
±20
31
-55 ... 175
55/175/56
Unit
A
mJ
kV/µs
V
W
°C
2006-06-02




 IPB80CN10NG
IPB80CN10N G IPD78CN10N G
IPI80CN10N G IPP80CN10N G IPU78CN10N G
Parameter
Symbol Conditions
min.
Values
typ.
Unit
max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction -
ambient (TO220, TO262, TO263)
R thJC
R thJA
Thermal resistance, junction -
ambient (TO252, TO251)
minimal footprint
6 cm2 cooling area4)
minimal footprint
6 cm2 cooling area4)
-
-
-
-
-
- 4.9 K/W
- 62
- 40
- 75
- 50
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
V (BR)DSS V GS=0 V, I D=1 mA
V GS(th) V DS=V GS, I D=12 µA
I DSS
V DS=80 V, V GS=0 V,
T j=25 °C
100
2
-
-
3
0.1
-V
4
1 µA
Gate-source leakage current
www.DataSheet4U.com
Drain-source on-state resistance
V DS=80 V, V GS=0 V,
T j=125 °C
I GSS
V GS=20 V, V DS=0 V
R DS(on)
V GS=10 V, I D=13 A,
(TO252)
-
-
-
10 100
1 100 nA
59 78 m
V GS=10 V, I D=13 A,
(TO251)
-
59 78
V GS=10 V, I D=13 A,
(TO263)
-
61 80
Gate resistance
Transconductance
V GS=10 V, I D=13 A,
(TO220, TO262)
-
RG -
g fs
|V DS|>2|I D|R DS(on)max,
I D=13 A
7
61 80
0.8 -
13 - S
4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.01
page 2
2006-06-02




 IPB80CN10NG
Parameter
IPB80CN10N G IPD78CN10N G
IPI80CN10N G IPP80CN10N G IPU78CN10N G
Symbol Conditions
min.
Values
typ.
Unit
max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C iss
C oss
C rss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=50 V,
f =1 MHz
V DD=50 V, V GS=10 V,
I D=13 A, R G=2.4
-
-
-
-
-
-
-
538 716 pF
76 101
8 12
9 13 ns
46
13 18
34
Gate Charge Characteristics5)
Gate to source charge
Gate to drain charge
Switching charge
Gate charge total
Gate plateau voltage
Output charge
Q gs - 3 4 nC
Q gd
Q sw
V DD=50 V, I D=13 A,
V GS=0 to 10 V
Qg
-
-
-
23
35
8 11
V plateau
- 5.7 - V
Q oss
V DD=50 V, V GS=0 V
-
8 10 nC
www.DatRaSehveeert4sUe.cDomiode
Diode continous forward current
Diode pulse current
Diode forward voltage
Reverse recovery time
Reverse recovery charge
IS
I S,pulse
V SD
t rr
Q rr
T C=25 °C
V GS=0 V, I F=13 A,
T j=25 °C
V R=50 V, I F=I S,
di F/dt =100 A/µs
- - 13 A
- - 52
- 1 1.2 V
- 67 - ns
- 114 - nC
5) See figure 16 for gate charge parameter definition
Rev. 1.01
page 3
2006-06-02




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