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Power-Transistor. IPB80N04S2L-03 Datasheet

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Power-Transistor. IPB80N04S2L-03 Datasheet
















IPB80N04S2L-03 Power-Transistor. Datasheet pdf. Equivalent













Part

IPB80N04S2L-03

Description

Power-Transistor



Feature


IPB80N04S2L-03 IPP80N04S2L-03 OptiMOS® Power-Transistor Features • N-channe l Logic Level - Enhancement mode • Au tomotive AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C opera ting temperature • Green package (lea d free) • Ultra low Rds(on) • 100% Avalanche tested Product Summary V DS R DS(on),max (SMD version) ID 40 3.1 80 V mΩ A PG-TO263-3-2 PG-TO220-3-1.
Manufacture

Infineon Technologies

Datasheet
Download IPB80N04S2L-03 Datasheet


Infineon Technologies IPB80N04S2L-03

IPB80N04S2L-03; Type IPB80N04S2L-03 IPP80N04S2L-03 Pa ckage PG-TO263-3-2 PG-TO220-3-1 Orderi ng Code SP0002-20158 SP0002-19063 Mark ing 2N04L03 2N04L03 Maximum ratings, a t T j=25 °C, unless otherwise specifie d Parameter Continuous drain current1) www.DataSheet4U.com Symbol ID Conditi ons T C=25 °C, V GS=10 V T C=100 °C, V GS=10 V2) Value 80 80 320 810 ±20 Unit A Pulsed drain c.


Infineon Technologies IPB80N04S2L-03

urrent2) Avalanche energy, single pulse2 ) Gate source voltage4) Power dissipati on Operating and storage temperature I D,pulse E AS V GS P tot T j, T stg T C=25 °C I D=80A mJ V W °C T C=25 ° C 300 -55 ... +175 Rev. 1.0 page 1 2006-03-02 IPB80N04S2L-03 IPP80N04S2L- 03 Parameter Symbol Conditions min. The rmal characteristics2) Thermal resistan ce, junction - case T.


Infineon Technologies IPB80N04S2L-03

hermal resistance, junction ambient, lea ded SMD version, device on PCB R thJC R thJA R thJA minimal footprint 6 cm2 co oling area5) Electrical characteristics , at T j=25 °C, unless otherwise speci fied Static characteristics Drain-sourc e breakdown voltage Gate threshold volt age V (BR)DSS V GS=0 V, I D= 1 mA V GS( th) V DS=V GS, I D=250 µA V DS=40 V, V GS=0 V, T j=25 °C V.





Part

IPB80N04S2L-03

Description

Power-Transistor



Feature


IPB80N04S2L-03 IPP80N04S2L-03 OptiMOS® Power-Transistor Features • N-channe l Logic Level - Enhancement mode • Au tomotive AEC Q101 qualified • MSL1 up to 260°C peak reflow • 175°C opera ting temperature • Green package (lea d free) • Ultra low Rds(on) • 100% Avalanche tested Product Summary V DS R DS(on),max (SMD version) ID 40 3.1 80 V mΩ A PG-TO263-3-2 PG-TO220-3-1.
Manufacture

Infineon Technologies

Datasheet
Download IPB80N04S2L-03 Datasheet




 IPB80N04S2L-03
OptiMOS® Power-Transistor
Features
• N-channel Logic Level - Enhancement mode
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
Green package (lead free)
• Ultra low Rds(on)
• 100% Avalanche tested
IPB80N04S2L-03
IPP80N04S2L-03
Product Summary
V DS
R DS(on),max (SMD version)
ID
40 V
3.1 m
80 A
PG-TO263-3-2
PG-TO220-3-1
Type
IPB80N04S2L-03
IPP80N04S2L-03
Package
Ordering Code Marking
PG-TO263-3-2 SP0002-20158 2N04L03
PG-TO220-3-1 SP0002-19063 2N04L03
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Continuous drain current1)
www.DataSheet4U.com
Pulsed drain current2)
Avalanche energy, single pulse2)
Gate source voltage4)
Power dissipation
Operating and storage temperature
I D T C=25 °C, V GS=10 V
T C=100 °C,
V GS=10 V2)
I D,pulse T C=25 °C
E AS I D=80A
V GS
P tot T C=25 °C
T j, T stg
Value
80
80
320
810
±20
300
-55 ... +175
Unit
A
mJ
V
W
°C
Rev. 1.0
page 1
2006-03-02




 IPB80N04S2L-03
Parameter
Symbol
Conditions
Thermal characteristics2)
Thermal resistance, junction - case R thJC
Thermal resistance, junction -
ambient, leaded
R thJA
SMD version, device on PCB
R thJA
minimal footprint
6 cm2 cooling area5)
IPB80N04S2L-03
IPP80N04S2L-03
min.
Values
typ.
Unit
max.
- - 0.5 K/W
- - 62
- - 62
- - 40
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
V (BR)DSS V GS=0 V, I D= 1 mA
V GS(th) V DS=V GS, I D=250 µA
40
1.2
Zero gate voltage drain current
www.DatGaSahteee-st4oUu.crocme leakage current
Drain-source on-state resistance
I DSS
I GSS
V DS=40 V, V GS=0 V,
T j=25 °C
V DS=40 V, V GS=0 V,
T j=125 °C2)
V GS=20 V, V DS=0 V
R DS(on) V GS=4.5 V, I D=80 A
-
-
-
-
-
1.6
0.01
1
1
3.6
-V
2.0
1 µA
100
100 nA
4.5 m
V GS=4.5 V, I D=80 A,
SMD version
-
3.3 4.2
Drain-source on-state resistance
RDS(on) V GS=10 V, I D=80 A
- 2.7 3.4 m
V GS=10 V, I D=80 A,
SMD version
-
2.4 3.1
Rev. 1.0
page 2
2006-03-02




 IPB80N04S2L-03
Parameter
Symbol
Conditions
IPB80N04S2L-03
IPP80N04S2L-03
min.
Values
typ.
Unit
max.
Dynamic characteristics2)
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C iss
C oss
Crss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=20 V, V GS=10 V,
I D=80 A, R G=1.1
-
-
-
-
-
-
-
6000
2200
700
19
50
77
27
- pF
-
-
- ns
-
-
-
Gate Charge Characteristics2)
Gate to source charge
Q gs
- 19 24 nC
Gate to drain charge
Gate charge total
Q gd V DD=32 V, I D=80 A,
-
55 81
Q g V GS=0 to 10 V
- 163 213
Gate plateau voltage
V plateau
- 3.2 - V
Reverse Diode
Diode continous forward current2)
www.DatDaSiohdeeet4pUu.clsoemcurrent2)
Diode forward voltage
IS
I S,pulse
V SD
T C=25 °C
V GS=0 V, I F=80 A,
T j=25 °C
- - 80 A
- - 320
- 0.9 1.3 V
Reverse recovery time2)
t rr
V R=20 V, I F=I S,
di F/dt =100 A/µs
- 62 78 ns
Reverse recovery charge2)
Q rr
V R=20 V, I F=I S,
di F/dt =100 A/µs
- 145 180 nC
1) Current is limited by bondwire; with an R thJC = 0.5K/W the chip is able to carry 217A at 25°C. For detailed
information see Application Note ANPS071E at www.infineon.com/optimos
2) Defined by design. Not subject to production test.
3) See diagram 13
4) Qualified at -20V and +20V.
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2006-03-02




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